� ���\8��( ��X#asus,rk3288-tinkerrockchip,rk3288&"7Rockchip RK3288 Asus Tinker Boardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000�/serial@ff190000�/serial@ff690000�/serial@ff1b0000�/serial@ff1c0000�/spi@ff110000�/spi@ff120000�/spi@ff130000arm-pmuarm,cortex-a12-pmu0������cpus�rockchip,rk3066-smp�cpu@500�cpuarm,cortex-a12��'�@5<rV bcpu@501�cpuarm,cortex-a12��'�@5<rbcpu@502�cpuarm,cortex-a12��'�@5<rbcpu@503�cpuarm,cortex-a12��'�@5<rbopp-table-0operating-points-v2jbopp-126000000u���| ��opp-216000000u ��| ��opp-312000000u��| ��opp-408000000uQ�| ��opp-600000000u#�F| ��opp-696000000u)||~�opp-816000000u0�,|B@opp-1008000000u<�|�opp-1200000000uG��|��opp-1416000000uTfr|O�opp-1512000000uZJ|� opp-1608000000u_�"|�popp-1704000000ue��|�popp-1800000000ukI�|\�reserved-memory�dma-unusable@fe000000��oscillator fixed-clock�n6�xin24m�b timerarm,armv7-timer�0�   �n6�timer@ff810000rockchip,rk3288-timer���  �H 5a  �pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshc�р 5�Drv�biuciuciu-driveciu-sample � �� @��'reset3okay:DVgq|default� ��mmc@ff0d0000rockchip,rk3288-dw-mshc��� 5�Esw�biuciuciu-driveciu-sample �!�� @��'reset3okay:V����|default�����mmc@ff0e0000rockchip,rk3288-dw-mshc�р 5�Ftx�biuciuciu-driveciu-sample �"��@��'reset 3disabledmmc@ff0f0000rockchip,rk3288-dw-mshc�р 5�Guy�biuciuciu-driveciu-sample �#��@��'reset 3disabledsaradc@ff100000rockchip,saradc�� �$5I[�saradcapb_pclk�W 'saradc-apb3okay"spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5AR�spiclkapb_pclk.  3txrx �,|default��� 3disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BS�spiclkapb_pclk. 3txrx �-|default� !"#�� 3disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CT�spiclkapb_pclk.3txrx �.|default�$%&'�� 3disabledi2c@ff140000rockchip,rk3288-i2c�� �>�i2c5M|default�( 3disabledi2c@ff150000rockchip,rk3288-i2c�� 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�5��������tsadc@ff280000rockchip,rk3288-tsadc��( �%5HZ�tsadcapb_pclk�� 'tsadc-apb|initdefaultsleep�6�7�68's3okay>Ub1ethernet@ff290000rockchip,rk3288-gmac��)�pmacirqeth_wake_irq885�fgc��]M�stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�B 'stmmaceth3okay���9�input�rgmii�:|default�; �<� �'B@0 usb@ff500000 generic-ehci��P �5�=usb3okayusb@ff520000 generic-ohci��R �)5�=usb 3disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2��T �5��otg$host> usb2-phy,3okayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2��X �5��otg$otgCUd��@@ ? usb2-phy3okayusb@ff5c0000 generic-ehci��\ �5� 3disableddma-controller@ff600000arm,pl330arm,primecell��`@�T_z5� �apb_pclk 3disabledi2c@ff650000rockchip,rk3288-i2c��e �<�i2c5L|default�@3okay��pmic@1brockchip,rk808�&A���xin32krk808-clkout2sA A |default�BCDE}��F�F�F�F�F�F� F&3bregulatorsDCDC_REG1@Tf q�~\��vdd_arm�pb regulator-state-mem�DCDC_REG2@Tf �P~��vdd_gpu�pburegulator-state-mem��B@DCDC_REG3@T�vcc_ddrregulator-state-mem�DCDC_REG4@Tf2Z�~2Z��vcc_iobregulator-state-mem��2Z�LDO_REG1@Tfw@~w@ �vcc18_ldo1bregulator-state-mem��w@LDO_REG2@Tf2Z�~2Z� �vcc33_mipiregulator-state-mem�LDO_REG3@TfB@~B@�vdd_10regulator-state-mem��B@LDO_REG4@Tfw@~w@ �vcc18_codecregulator-state-mem��w@LDO_REG5@Tfw@~2Z� �vccio_sdbregulator-state-mem��2Z�LDO_REG6@TfB@~B@ �vdd10_lcdregulator-state-mem��B@LDO_REG7@Tfw@~w@�vcc_18bregulator-state-mem��w@LDO_REG8@Tfw@~w@ �vcc18_lcdregulator-state-mem��w@SWITCH_REG1@T �vcc33_sdbregulator-state-mem�SWITCH_REG2@T �vcc33_lanb:regulator-state-mem�i2c@ff660000rockchip,rk3288-i2c��f �=�i2c5N|default�G3okaypwm@ff680000rockchip,rk3288-pwm��h|default�H5_3okaypwm@ff680010rockchip,rk3288-pwm��h|default�I5_ 3disabledpwm@ff680020rockchip,rk3288-pwm��h |default�J5_ 3disabledpwm@ff680030rockchip,rk3288-pwm��h0|default�K5_ 3disabledsram@ff700000 mmio-sram��p���p�smp-sram@0rockchip,rk3066-smp-sram�sram@ff720000#rockchip,rk3288-pmu-srammmio-sram��rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd��sbpower-controller!rockchip,rk3288-power-controller�h� b]power-domain@9� �5��������������chgfdehilkj$&LMNOPQRSTpower-domain@11� 5�op&UVpower-domain@12� 5��&Wpower-domain@13� 5�&XYreboot-modesyscon-reboot-mode-�4RB�@RB�NRB� ^RB�syscon@ff740000rockchip,rk3288-sgrfsyscon��tclock-controller@ff760000rockchip,rk3288-cru��v5 �xin24m8�jH���j��k$w#g��ׄ�e��рxh���рxh�bsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd��wb8edp-phyrockchip,rk3288-dp-phy5h�24m� 3disabledbmio-domains"rockchip,rk3288-io-voltage-domain3okay��usbphyrockchip,rk3288-usb-phy3okayusb-phy@320�� 5]�phyclk��� 'phy-resetb?usb-phy@334��45^�phyclk��� 'phy-resetb=usb-phy@348��H5_�phyclk��� 'phy-resetb>watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt���5p �O3okaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif����5T� �mclkhclk.Z3tx �6|default�[8 3disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s���� �55R��i2s_clki2s_hclk.ZZ3txrx|default�\��3okayb�crypto@ff8a0000rockchip,rk3288-crypto���@ �0 5��}��aclkhclksclkapb_pclk�� 'crypto-rstiommu@ff900800rockchip,iommu���@ �5�� �aclkiface� 3disablediommu@ff914000rockchip,iommu ���@��P �5�� �aclkiface� 3disabledrga@ff920000rockchip,rk3288-rga���� �5��j�aclkhclksclk] �ilm 'coreaxiahbvop@ff930000rockchip,rk3288-vop ������ �5����aclk_vopdclk_vophclk_vop] �def 'axiahbdclk-^3okayportb endpoint@0�4_bqendpoint@1�4`bnendpoint@2�4abhendpoint@3�4bbkiommu@ff930300rockchip,iommu��� �5�� �aclkiface] �3okayb^vop@ff940000rockchip,rk3288-vop ������ �5����aclk_vopdclk_vophclk_vop] ���� 'axiahbdclk-c3okayportb endpoint@0�4dbrendpoint@1�4eboendpoint@2�4fbiendpoint@3�4gbliommu@ff940300rockchip,iommu��� �5�� �aclkiface] �3okaybcmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi���@ �5~d �refpclk] 8 3disabledportsportendpoint@0�4hbaendpoint@1�4ibflvds@ff96c000rockchip,rk3288-lvds����@5g �pclk_lvds|lcdc�j] 8 3disabledportsport@0�endpoint@0�4kbbendpoint@1�4lbgdp@ff970000rockchip,rk3288-dp���@ �b5ic�dppclkmdp�o'dp8 3disabledportsport@0�endpoint@0�4nb`endpoint@1�4obehdmi@ff980000rockchip,rk3288-dw-hdmi���G�8 �g5hmn�iahbisfrcec] 3okayDpb�portsportendpoint@0�4qb_endpoint@1�4rbdvideo-codec@ff9a0000rockchip,rk3288-vpu����   pvepuvdpu5�� �aclkhclk-s] iommu@ff9a0800rockchip,iommu��� � 5�� �aclkiface�] bsiommu@ff9c0440rockchip,iommu ���@@���@ �o5�� �aclkiface� 3disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760���$� pjobmmugpu5�t] 3okayPub5opp-table-1operating-points-v2btopp-100000000u��|~�opp-200000000u ��|~�opp-300000000u�|B@opp-400000000uׄ|��opp-600000000u#�F|�qos@ffaa0000rockchip,rk3288-qossyscon��� bXqos@ffaa0080rockchip,rk3288-qossyscon���� bYqos@ffad0000rockchip,rk3288-qossyscon��� bMqos@ffad0100rockchip,rk3288-qossyscon��� bNqos@ffad0180rockchip,rk3288-qossyscon���� bOqos@ffad0400rockchip,rk3288-qossyscon��� bPqos@ffad0480rockchip,rk3288-qossyscon���� bQqos@ffad0500rockchip,rk3288-qossyscon��� bLqos@ffad0800rockchip,rk3288-qossyscon��� bRqos@ffad0880rockchip,rk3288-qossyscon���� bSqos@ffad0900rockchip,rk3288-qossyscon��� bTqos@ffae0000rockchip,rk3288-qossyscon��� bWqos@ffaf0000rockchip,rk3288-qossyscon��� bUqos@ffaf0080rockchip,rk3288-qossyscon���� bVdma-controller@ffb20000arm,pl330arm,primecell���@�T_z5� �apb_pclkbZefuse@ffb40000rockchip,rk3288-efuse��� 5q �pclk_efusecpu-id@7�cpu_leakage@17�interrupt-controller@ffc01000 arm,gic-400\q@����� ��@ ��`  � bpinctrlrockchip,rk3288-pinctrl8��gpio@ff750000rockchip,gpio-bank��u �Q5@��\qbAgpio@ff780000rockchip,gpio-bank��x �R5A��\qb~gpio@ff790000rockchip,gpio-bank��y �S5B��\qgpio@ff7a0000rockchip,gpio-bank��z �T5C��\qgpio@ff7b0000rockchip,gpio-bank��{ �U5D��\qb<gpio@ff7c0000rockchip,gpio-bank��| �V5E��\qgpio@ff7d0000rockchip,gpio-bank��} �W5F��\qgpio@ff7e0000rockchip,gpio-bank��~ �X5G��\qb�gpio@ff7f0000rockchip,gpio-bank�� �Y5H��\qhdmihdmi-cec-c0�vhdmi-cec-c7�vhdmi-ddc �vvhdmi-ddc-unwedge �wvpcfg-output-low�bwpcfg-pull-up�bxpcfg-pull-down�bypcfg-pull-none�bvpcfg-pull-none-12ma�� b|suspendglobal-pwroff�vbCddrio-pwroff�vddr0-retention�xddr1-retention�xedpedp-hpd� yi2c0i2c0-xfer �vvb@i2c1i2c1-xfer �vvb(i2c2i2c2-xfer � v vbGi2c3i2c3-xfer �vvb)i2c4i2c4-xfer �vvb*i2c5i2c5-xfer �vvb+i2s0i2s0-bus`�vvvvvvb\lcdclcdc-ctl@�vvvvbjsdmmcsdmmc-clk�zb sdmmc-cmd�{bsdmmc-cd�xbsdmmc-bus1�xsdmmc-bus4@�{{{{bsdmmc-pwr� vb�sdio0sdio0-bus1�xsdio0-bus4@�xxxxbsdio0-cmd�xbsdio0-clk�vbsdio0-cd�xsdio0-wp�xsdio0-pwr�xsdio0-bkpwr�xsdio0-int�xbsdio1sdio1-bus1�xsdio1-bus4@�xxxxsdio1-cd�xsdio1-wp�xsdio1-bkpwr�xsdio1-int�xsdio1-cmd�xsdio1-clk�vsdio1-pwr� xemmcemmc-clk�vemmc-cmd�xemmc-pwr� xemmc-bus1�xemmc-bus4@�xxxxemmc-bus8��xxxxxxxxspi0spi0-clk� xbspi0-cs0� xbspi0-tx�xbspi0-rx�xbspi0-cs1�xspi1spi1-clk� xb spi1-cs0� xb#spi1-rx�xb"spi1-tx�xb!spi2spi2-cs1�xspi2-clk�xb$spi2-cs0�xb'spi2-rx�xb&spi2-tx� xb%uart0uart0-xfer �xvb,uart0-cts�xuart0-rts�vuart1uart1-xfer �x vb-uart1-cts� xuart1-rts� vuart2uart2-xfer �xvb.uart3uart3-xfer �xvb/uart3-cts� xuart3-rts� vuart4uart4-xfer �xvb0uart4-cts� xuart4-rts� vtsadcotp-pin� vb6otp-out� vb7pwm0pwm0-pin�vbHpwm1pwm1-pin�vbIpwm2pwm2-pin�vbJpwm3pwm3-pin�vbKgmacrgmii-pins��vvvv||||vvv ||vvb;rmii-pins��vvvvvvvvvvspdifspdif-tx� vb[pcfg-pull-none-drv-8ma�bzpcfg-pull-up-drv-8ma��b{backlightbl-en�vbuttonspwrbtn�xb}eth_phyeth-phy-pwr�vpmicpmic-int�xbBdvs-1� ybDdvs-2� ybEusbhost-vbus-drv�vpwr-3g�vsdiowifi-enable �vvb�chosen�serial2:115200n8memory���memoryexternal-gmac-clock fixed-clock��sY@ �ext_gmacb9gpio-keys gpio-keys�|default�}button wA t GPIO Key Power � (dgpio-leds gpio-ledsled-0 w~ :mmc0led-1 w~ :heartbeatled-2 wA :default-onsdio-pwrseqmmc-pwrseq-simple5 �ext_clock|default�� P<<bsoundsimple-audio-card \i2s urockchip,tinker-codec �simple-audio-card,codec ��simple-audio-card,cpu ��vsys-regulatorregulator-fixed�vcc_sysfLK@~LK@@TbFsdmmc-regulatorregulator-fixed �� |default���vcc_sdf2Z�~2Z� ��� � #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggerreset-gpiossimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply