� ���8̈( |�P ",lckfb,tspi-rk3566rockchip,rk35667LCKFB Taishan Pi RK3566aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000�/serial@fe660000�/serial@fe670000�/serial@fe680000�/serial@fe690000�/serial@fe6a0000�/serial@fe6b0000�/serial@fe6c0000�/serial@fe6d0000�/spi@fe610000�/spi@fe620000�/spi@fe630000�/spi@fe640000�/mmc@fe2b0000�/mmc@fe310000�/mmc@fe2c0000cpus cpu@0�cpu,arm,cortex-a55��psci 4�A@S�`�m@���� cpu@100�cpu,arm,cortex-a55�psci 4�A@S�`�m@���� cpu@200�cpu,arm,cortex-a55�psci 4�A@S�`�m@���� cpu@300�cpu,arm,cortex-a55�psci 4�A@S�`�m@���� l3-cache,cache��6C@U�opp-table-0,operating-points-v2��opp-408000000�Q� � �� ���0��@opp-600000000�#�F � �� ���0opp-816000000�0�, � �� ���0�opp-1104000000�Aʹ � �� ���0opp-1416000000�Tfr � �� ���0opp-1608000000�_�" ������0opp-1800000000�kI� ����0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc � protocol@14��opp-table-1,operating-points-v2�Copp-200000000� �� � �P �PB@opp-300000000�� � �P �PB@opp-400000000�ׄ � �P �PB@opp-600000000�#�F � �� ��B@opp-700000000�)�' �~�~�B@opp-800000000�/� �B@B@B@hdmi-sound,simple-audio-card+HDMIBi2s[uokaysimple-audio-card,codec|simple-audio-card,cpu| pmu,arm,cortex-a55-pmu0������ psci ,arm,psci-1.0smctimer,arm,armv8-timer0�   �xin24m ,fixed-clock�n6�xin24m�xin32k ,fixed-clock���xin32k��defaultsram@10f000 ,mmio-sram�� ��sram@0,arm,scmi-shmem��sata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci��@�����satapmaliverxoob �_  sata-phy* udisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci��������satapmaliverxoob �`  sata-phy* udisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3���@ �������ref_clksuspend_clkbus_clk8otg @utmi_wide*I�Puokay  usb2-phyi phigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3��@ �������ref_clksuspend_clkbus_clk8host  usb2-phyusb3-phy @utmi_wide*I�Puokayinterrupt-controller@fd400000 ,arm,gic-v3 ��@�F � ~���A�(��usb@fd800000 ,generic-ehci��� ������ usbuokayusb@fd840000 ,generic-ohci��� ������ usbuokayusb@fd880000 ,generic-ehci��� ������ usbuokayusb@fd8c0000 ,generic-ohci��� ������ usbuokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd����Uio-domains&,rockchip,rk3568-pmu-io-voltage-domainuokay����*8reboot-mode,syscon-reboot-modeFMRB�YRB�eRB�sRB� syscon@fdc50000��� ,rockchip,rk3566-pipe-grfsyscon��syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd����syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon�����syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon�����syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon������syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon��ʀ���clock-controller@fdd00000,rockchip,rk3568-pmucru�����clock-controller@fdd20000,rockchip,rk3568-cru�����xin24m�� ��G�� �����i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c��� �.�- �i2cpclk� �default uokayregulator@1c ,tcs,tcs4525���vdd_cpu+ 5C�0[�p!�regulator-state-mem{pmic@20,rockchip,rk809� �H���rk808-clkout1rk808-clkout2�mclk�H"��default�#$����%�%�%�%%%%(%4%��regulatorsDCDC_REG1 �vdd_logic+� C�p[q@regulator-state-mem{DCDC_REG2�vdd_gpu+� C�p[q@�Dregulator-state-mem{DCDC_REG3�vcc_ddr@regulator-state-memWDCDC_REG4�vdd_npu+� C�p[q@regulator-state-mem{LDO_REG1�vdda0v9_image+ ��C ���Qregulator-state-mem{LDO_REG2 �vdda_0v9+ ��C ��regulator-state-mem{LDO_REG3 �vdda0v9_pmu+ ��C ��regulator-state-memWo ��LDO_REG4 �vccio_acodec+2Z�C2Z��regulator-state-mem{LDO_REG5 �vccio_sd+w@C2Z��regulator-state-mem{LDO_REG6 �vcc3v3_pmu+2Z�C2Z��regulator-state-memWo2Z�LDO_REG7 �vcca_1v8+w@Cw@��regulator-state-mem{LDO_REG8 �vcca1v8_pmu+w@Cw@regulator-state-memWow@LDO_REG9�vcca1v8_image+w@Cw@�Rregulator-state-mem{DCDC_REG5�vcc_1v8+w@Cw@�regulator-state-mem{SWITCH_REG1�vcc_3v3�regulator-state-mem{SWITCH_REG2 �vcc3v3_sd�[regulator-state-mem{codec�serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart��� �t� ,�baudclkapb_pclk�&&�'�default�� udisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm���� 0 �pwmpclk�(�default� udisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm���� 0 �pwmpclk�)�default� udisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm��� � 0 �pwmpclk�*�default� udisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm���0� 0 �pwmpclk�+�default� udisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd���power-controller!,rockchip,rk3568-power-controller� �power-domain@7���,�power-domain@8���� �-./�power-domain@9� ���� �012�power-domain@10� ����345678�power-domain@11� ���9�power-domain@13�� �:�power-domain@14�� �;<=�power-domain@15���>?@AB�gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost���@$�()' �jobmmugpu��gpubus C*uokay�D��video-codec@fdea0400,rockchip,rk3568-vpu��� ���vdpu��� �aclkhclkE* iommu@fdea0800,rockchip,rk3568-iommu���@ �� �aclkiface���*  �Erga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga���� �Z�����aclkhclksclkI&$% coreaxiahb* video-codec@fdee0000,rockchip,rk3568-vepu��� �@��� �aclkhclkF* iommu@fdee0800,rockchip,rk3568-iommu���@ �?��� �aclkiface*  �Fmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc��@ �d ������biuciuciu-driveciu-sample&1�рI�reset udisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a��� �macirqeth_wake_irq@���������W�stmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refI� stmmaceth�?GO`HsI� udisabledmdio,snps,dwmac-mdio stmmac-axi-config����Grx-queues-config��Hqueue0tx-queues-config��Iqueue0vop@fe040000 ��0�@�vopgamma-lut ��(������%�aclkhclkdclk_vp0dclk_vp1dclk_vp2J* �uokay,rockchip,rk3566-vop����ports �port@0� endpoint@2��K�Sport@1� port@2� iommu@fe043e00,rockchip,rk3568-iommu ��>�? ����� �aclkiface * uokay�Jdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi�� �D�pclk��dphy L* apbI� udisabledports port@0�port@1�dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi�� �E�pclk��dphy M* apbI� udisabledports port@0�port@1�hdmi@fe0a0000,rockchip,rk3568-dw-hdmi��  �-(����(��iahbisfrcecref�default �NOP* ���uokay�QR�ports port@0�endpoint�S�Kport@1�endpoint�T��qos@fe128000,rockchip,rk3568-qossyscon��� �,qos@fe138080,rockchip,rk3568-qossyscon���� �;qos@fe138100,rockchip,rk3568-qossyscon��� �<qos@fe138180,rockchip,rk3568-qossyscon���� �=qos@fe148000,rockchip,rk3568-qossyscon��� �-qos@fe148080,rockchip,rk3568-qossyscon���� �.qos@fe148100,rockchip,rk3568-qossyscon��� �/qos@fe150000,rockchip,rk3568-qossyscon�� �9qos@fe158000,rockchip,rk3568-qossyscon��� �3qos@fe158100,rockchip,rk3568-qossyscon��� �4qos@fe158180,rockchip,rk3568-qossyscon���� �5qos@fe158200,rockchip,rk3568-qossyscon��� �6qos@fe158280,rockchip,rk3568-qossyscon���� �7qos@fe158300,rockchip,rk3568-qossyscon��� �8qos@fe180000,rockchip,rk3568-qossyscon�� qos@fe190000,rockchip,rk3568-qossyscon�� �>qos@fe190280,rockchip,rk3568-qossyscon��� �?qos@fe190300,rockchip,rk3568-qossyscon�� �@qos@fe190380,rockchip,rk3568-qossyscon��� �Aqos@fe190400,rockchip,rk3568-qossyscon�� �Bqos@fe198000,rockchip,rk3568-qossyscon��� �:qos@fe1a8000,rockchip,rk3568-qossyscon��� �0qos@fe1a8080,rockchip,rk3568-qossyscon���� �1qos@fe1a8100,rockchip,rk3568-qossyscon��� �2dfi@fe230000,rockchip,rk3568-dfi��# � Upcie@fe260000,rockchip,rk3568-pcie0��@�&��dbiapbconfig<�KJIHG�syspmcmsglegacyerr,(������$�aclk_mstaclk_slvaclk_dbipclkaux�pci�6`IVVVVWhw���  pcie-phy*T���� � �@@I�pipe  udisabledlegacy-interrupt-controller�~ �H�Vmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc��+@ �b ������biuciuciu-driveciu-sample&1�рI�resetuokay�����default�WXYZ��[�mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc��,@ �c ������biuciuciu-driveciu-sample&1�рI�resetuokay�� �  )\ 4�default �]^_��%� wifi@1,brcm,bcm4329-fmac�`�  �host-wake�default�aspi@fe300000 ,rockchip,sfc��0@ �e�xv�clk_sfchclk_sfc�b�default udisabledmmc@fe310000,rockchip,rk3568-dwcmshc��1 ��{}� ��n6(�|zy{}�corebusaxiblocktimeruokay�1 �� 4�default�cdefg��rng@fe388000,rockchip,rk3568-rng��8�@�po �coreahbIm udisabledi2s@fe400000,rockchip,rk3568-i2s-tdm��@ �4�=A�F�qF�q�?C9�mclk_txmclk_rxhclk�h BtxIPQ tx-mrx-m��uokay� i2s@fe410000,rockchip,rk3568-i2s-tdm��A �5�EI�F�qF�q�GK:�mclk_txmclk_rxhclk�hh BrxtxIRS tx-mrx-m��default�ijkl�uokay L��i2s@fe420000,rockchip,rk3568-i2s-tdm��B �6�M�F�q�OO;�mclk_txmclk_rxhclk�hh BtxrxITtx-m��default�mnop�uokay Li2s@fe430000,rockchip,rk3568-i2s-tdm��C �7�SW<�mclk_txmclk_rxhclk�hh BtxrxIUV tx-mrx-m�� udisabledpdm@fe440000,rockchip,rk3568-pdm��D �L�ZY�pdm_clkpdm_hclk�h  Brx�qrstuv�defaultIXpdm-m� udisabledspdif@fe460000,rockchip,rk3568-spdif��F �f �mclkhclk�_\�h Btx�default�w� udisableddma-controller@fe530000,arm,pl330arm,primecell��S@�  g�  �apb_pclk ~�&dma-controller@fe550000,arm,pl330arm,primecell��U@� g�  �apb_pclk ~�hi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c��Z �/�HG �i2cpclk�x�default uokayi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c��[ �0�JI �i2cpclk�y�default  udisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c��\ �1�LK �i2cpclk�z�default  udisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c��] �2�NM �i2cpclk�{�default uokayi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c��^ �3�PO �i2cpclk�|�default  udisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt��` ��� �tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi��a �g�RQ�spiclkapb_pclk�&& Btxrx�default �}~  udisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi��b �h�TS�spiclkapb_pclk�&& Btxrx�default ����  udisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi��c �i�VU�spiclkapb_pclk�&& Btxrx�default ����  udisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi��d �j�XW�spiclkapb_pclk�&& Btxrx�default ����  udisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart��e �u��baudclkapb_pclk�&& �����default��uokay �bluetooth,brcm,bcm43438-bt���lpo �-���default ���� �` �% �serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart��f �v�# �baudclkapb_pclk�&&���default��uokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart��g �w�'$�baudclkapb_pclk�&&���default�� udisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart��h �x�+(�baudclkapb_pclk�&& ���default�� udisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart��i �y�/,�baudclkapb_pclk�& & ���default�� udisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart��j �z�30�baudclkapb_pclk�& & ���default�� udisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart��k �{�74�baudclkapb_pclk�&&���default�� udisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart��l �|�;8�baudclkapb_pclk�&&���default�� udisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart��m �}�?<�baudclkapb_pclk�&&���default�� udisabledthermal-zonescpu-thermal �d �� ��tripscpu_alert0 �p ��passive��cpu_alert1 �$� ��passivecpu_crit �s � �criticalcooling-mapsmap0 �0  �������� �������� �������� ��������gpu-thermal � �� ��tripsgpu-threshold �p ��passivegpu-target �$� ��passive��gpu-crit �s � �criticalcooling-mapsmap0 � ���������tsadc@fe710000,rockchip,rk3568-tsadc��q �s��f@ �`��tsadcapb_pclkI���� *s�defaultsleep�� A� Kuokay a x��saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc��r �]��saradcapb_pclkI� saradc-apb �uokay ����pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm��n�ZY �pwmpclk���default� udisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm��n�ZY �pwmpclk���default� udisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm��n �ZY �pwmpclk���default� udisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm��n0�ZY �pwmpclk���default� udisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm��o�]\ �pwmpclk���default� udisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm��o�]\ �pwmpclk���default� udisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm��o �]\ �pwmpclk���default� udisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm��o0�]\ �pwmpclk���default� udisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm��p�`_ �pwmpclk���default� udisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm��p�`_ �pwmpclk���default� udisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm��p �`_ �pwmpclk���default� udisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm��p0�`_ �pwmpclk���default� udisabledphy@fe830000,rockchip,rk3568-naneng-combphy����"} �refapbpipe�"���I� �� �� �uokay�phy@fe840000,rockchip,rk3568-naneng-combphy����%~ �refapbpipe�%���I� �� �� �uokay�phy@fe870000,rockchip,rk3568-csi-dphy����y�pclk �I�apb� udisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy��� �refpclk�z �* apbI� udisabled�Lmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy��� �refpclk�{ �* apbI� udisabled�Musb2phy@fe8a0000,rockchip,rk3568-usb2phy�����phyclk�clk_usbphy0_480m �� ��uokay�host-port �uokay �!�otg-port �uokay �!�usb2phy@fe8b0000,rockchip,rk3568-usb2phy�����phyclk�clk_usbphy1_480m �� ��uokayhost-port �uokay ���otg-port �uokay ���pinctrl,rockchip,rk3568-pinctrl�U ���gpio@fdd60000,rockchip,gpio-bank��� �!�.  � �  ~��"gpio@fe740000,rockchip,gpio-bank��t �"�cd � �  ~���gpio@fe750000,rockchip,gpio-bank��u �#�ef � �@  ~��`gpio@fe760000,rockchip,gpio-bank��v �$�gh � �`  ~�gpio@fe770000,rockchip,gpio-bank��w �%�ij � ��  ~���pcfg-pull-up '��pcfg-pull-down 4��pcfg-pull-none C��pcfg-pull-none-drv-level-1 C P��pcfg-pull-none-drv-level-2 C P��pcfg-pull-none-drv-level-3 C P��pcfg-pull-up-drv-level-1 ' P��pcfg-pull-up-drv-level-2 ' P��pcfg-pull-none-smt C _��acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 t��cpuebcedpdpemmcemmc-rstnout t��gemmc-bus8� t � ��������cemmc-clk t��demmc-cmd t��eemmc-datastrobe t��feth0eth1flashfspifspi-pins` t�������bgmac0gmac1gpuhdmitxhdmitxm0-cec t��Phdmitx-scl t��Nhdmitx-sda t��Oi2c0i2c0-xfer t � �� i2c1i2c1-xfer t � ��xi2c2i2c2m0-xfer t ���yi2c3i2c3m0-xfer t���zi2c4i2c4m0-xfer t � ��{i2c5i2c5m0-xfer t � ��|i2s1i2s1m0-lrcktx t��ji2s1m0-mclk t��$i2s1m0-sclktx t��ii2s1m0-sdi0 t ��ki2s1m0-sdo0 t��li2s2i2s2m0-lrcktx t��ni2s2m0-sclktx t��mi2s2m0-sdi t��oi2s2m0-sdo t��pi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk t��qpdmm0-clk1 t��rpdmm0-sdi0 t ��spdmm0-sdi1 t ��tpdmm0-sdi2 t ��updmm0-sdi3 t��vpmicpmic-int t��#pmupwm0pwm0m0-pins t��(pwm1pwm1m0-pins t��)pwm2pwm2m0-pins t��*pwm3pwm3-pins t��+pwm4pwm4-pins t���pwm5pwm5-pins t���pwm6pwm6-pins t���pwm7pwm7-pins t���pwm8pwm8m0-pins t ���pwm9pwm9m0-pins t ���pwm10pwm10m0-pins t ���pwm11pwm11m0-pins t���pwm12pwm12m0-pins t���pwm13pwm13m0-pins t���pwm14pwm14m0-pins t���pwm15pwm15m0-pins t���refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ t�����Wsdmmc0-clk t��Xsdmmc0-cmd t��Ysdmmc0-det t��Zsdmmc1sdmmc1-bus4@ t�����]sdmmc1-clk t��_sdmmc1-cmd t��^sdmmc2spdifspdifm0-tx t��wspi0spi0m0-pins0 t ����spi0m0-cs0 t��}spi0m0-cs1 t��~spi1spi1m0-pins0 t �����spi1m0-cs0 t���spi1m0-cs1 t���spi2spi2m0-pins0 t�����spi2m0-cs0 t���spi2m0-cs1 t���spi3spi3m0-pins0 t �� ���spi3m0-cs0 t���spi3m0-cs1 t���tsadctsadc-shutorg t���tsadc-pin t���uart0uart0-xfer t���'uart1uart1m0-xfer t � ���uart1m0-ctsn t���uart1m0-rtsn t ���uart2uart2m0-xfer t����uart3uart3m0-xfer t����uart4uart4m0-xfer t����uart5uart5m0-xfer t����uart6uart6m0-xfer t����uart7uart7m0-xfer t����uart8uart8m0-xfer t����uart9uart9m0-xfer t����vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h t���bt-host-wake-l t���bt-wake-l t���hp-detecthp-det t�sdio-pwrseqwifi-enable-h t ���wifi-host-wake-l t ��ausb2vcc5v0-host-en t���chosen �serial2:1500000n8reserved-memory �ramoops@110000,ramoops� � � � �adc-keys ,adc-keys �� �buttons �w@ �dbutton-recovery recovery � lhdmi-con,hdmi-connector�dportendpoint���Tleds ,gpio-ledsrgb-led-r - ��  status-red��rgb-led-g ��  - status-green��rgb-led-b �� - status-blue��multi-led,leds-group-multicolor -  status-rgb 3indicator <���regulator-12v0-dcin,regulator-fixed �vcc12v0_dcin+�C���regulator-3v3-vcc-sys,regulator-fixed �vcc3v3_sys+2Z�C2Z�p!�%regulator-5v0-vcc-sys,regulator-fixed �vcc5v0_sys+LK@CLK@p��!regulator-5v0-vcc-host,regulator-fixed A T��default�� �vcc5v0_host+LK@CLK@p!��sdio-pwrseq,mmc-pwrseq-simple�� �ext_clock�default�� Y� p` �\sound,simple-audio-cardBi2s +Analog RK809[simple-audio-card,cpu|�simple-audio-card,codec|� interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supplyoffsetmode-normalmode-loadermode-recoverymode-bootloader#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltrockchip,mic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsmax-speedshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathconsole-sizeftrace-sizepmsg-sizerecord-sizeio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolorfunctionledsenable-active-highgpiopost-power-on-delay-msreset-gpios