� ��֝8�( ��� 8,pine64,soquartz-model-apine64,soquartzrockchip,rk356607PINE64 RK3566 SOQuartz on Model A carrier boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000�/serial@fe660000�/serial@fe670000�/serial@fe680000�/serial@fe690000�/serial@fe6a0000�/serial@fe6b0000�/serial@fe6c0000�/serial@fe6d0000�/spi@fe610000�/spi@fe620000�/spi@fe630000�/spi@fe640000�/ethernet@fe010000�/mmc@fe2b0000�/mmc@fe310000�/mmc@fe2c0000cpus cpu@0�cpu,arm,cortex-a55 psci*>I cpu@100�cpu,arm,cortex-a55 psci*>I cpu@200�cpu,arm,cortex-a55 psci*>I cpu@300�cpu,arm,cortex-a55 psci*>I opp-table-0,operating-points-v2QIopp-408000000\Q� c �� ���0q�@opp-600000000\#�F c �� ���0opp-816000000\0�, c �� ���0�opp-1104000000\Aʹ c �� ���0opp-1416000000\Tfr c �� ���0opp-1608000000\_�" c�����0opp-1800000000\kI� c���0display-subsystem,rockchip,display-subsystem�firmwarescmi ,arm,scmi-smc��� protocol@14�Iopp-table-1,operating-points-v2I@opp-200000000\ ��c ��opp-300000000\�c ��opp-400000000\ׄc ��opp-600000000\#�Fc ��opp-700000000\)�'c ��opp-800000000\/�cB@hdmi-sound,simple-audio-card�HDMI�i2s��okaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 ���� psci ,arm,psci-1.0#smctimer,arm,armv8-timer0    +xin24m ,fixed-clockBn6Rxin24m�Ixin32k ,fixed-clockB�Rxin32ke odefault�sram@10f000 ,mmio-sram� }�sram@0,arm,scmi-shmemIsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci�@����satapmaliverxoob  _� �sata-phy�� �disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci������satapmaliverxoob  `� �sata-phy�� �disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3��@  �����ref_clksuspend_clkbus_clk�otg �utmi_wide�����okay� �usb2-phy� �high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3�@  �����ref_clksuspend_clkbus_clk�host ��usb2-phyusb3-phy �utmi_wide���� �disabledinterrupt-controller@fd400000 ,arm,gic-v3 �@�F   +�A5(@Iusb@fd800000 ,generic-ehci��  ������usb �disabledusb@fd840000 ,generic-ohci��  ������usb �disabledusb@fd880000 ,generic-ehci��  ������usb �disabledusb@fd8c0000 ,generic-ohci��  ������usb �disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd��I�io-domains&,rockchip,rk3568-pmu-io-voltage-domain�okayO]ky�����syscon@fdc50000�� ,rockchip,rk3566-pipe-grfsysconI�syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd��Isyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon��I�syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon��I�syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon���I�syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon�ʀ�I�clock-controller@fdd00000,rockchip,rk3568-pmucru����Iclock-controller@fdd20000,rockchip,rk3568-cru���xin24m����G�� ���Ii2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c��  .- �i2cpclkeodefault �okayregulator@1c ,tcs,tcs4525 )vdd_cpu8 5P�0h�}��Iregulator-state-mem�pmic@20,rockchip,rk809   �Rrk808-clkout1rk808-clkout2odefaulte!���""""&"2">"J"V"I�regulatorsDCDC_REG1 )vdd_logic}�8� P�pb ��hq{regulator-state-mem�� ��DCDC_REG2)vdd_gpu}�8� P�pb ��hq{IAregulator-state-mem�DCDC_REG3}�{)vcc_ddrregulator-state-mem�DCDC_REG4}�8� P�pb ��{)vdd_npuregulator-state-mem�DCDC_REG5)vcc_1v8}�8w@Pw@Iregulator-state-mem��w@LDO_REG1}�8 ��P ��)vdda0v9_imageIVregulator-state-mem�� ��LDO_REG2}�8 ��P �� )vdda_0v9regulator-state-mem�LDO_REG3}�8 ��P �� )vdda0v9_pmuregulator-state-mem�� ��LDO_REG4}�82Z�P2Z� )vccio_acodecregulator-state-mem�LDO_REG5}�8w@P2Z� )vccio_sdIregulator-state-mem�LDO_REG6}�82Z�P2Z� )vcc3v3_pmuIregulator-state-mem��2Z�LDO_REG7}�8w@Pw@ )vcca_1v8I�regulator-state-mem�LDO_REG8}�8w@Pw@ )vcca1v8_pmuI�regulator-state-mem�LDO_REG9}�8w@Pw@)vcca1v8_imageIWregulator-state-mem�SWITCH_REG1)vcc_3v3Iregulator-state-mem�SWITCH_REG2 )vcc3v3_sd�okay}�82Z�P2Z�Ibregulator-state-mem�serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart��  t ,�baudclkapb_pclk�##e$odefault�� �disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm�� 0 �pwmpclke%odefault� �disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm�� 0 �pwmpclke&odefault� �disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm��  0 �pwmpclke'odefault� �disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm��0 0 �pwmpclke(odefault� �disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd��power-controller!,rockchip,rk3568-power-controller� Ipower-domain@7)�power-domain@8�� *+,�power-domain@9 ��� -./�power-domain@10 ��012345�power-domain@11 �6�power-domain@13 7�power-domain@14 89:�power-domain@15;<=>?�gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost��@$ ()' jobmmugpu�gpubus *@��okayAI�video-codec@fdea0400,rockchip,rk3568-vpu��  ��� �aclkhclk$B� iommu@fdea0800,rockchip,rk3568-iommu��@  � �aclkiface��� +IBvideo-codec@fdee0000,rockchip,rk3568-vepu��  @�� �aclkhclk$C� iommu@fdee0800,rockchip,rk3568-iommu��@  ?�� �aclkiface� +ICmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc�@  d �����biuciuciu-driveciu-sample8C�р��Qreset �disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a� macirqeth_wake_irq@��������W�stmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref�� Qstmmaceth�]Dm~E�F��okay�������G�input��rgmiiodefaulteHIJKLM � �  N �� 0)2Nmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22�okayINstmmac-axi-config=GWIDrx-queues-configgIEqueue0tx-queues-config}IFqueue0vop@fe040000 �0�@�vopgamma-lut  �(�����%�aclkhclkdclk_vp0dclk_vp1dclk_vp2$O� ��okay,rockchip,rk3566-vop����ports Iport@0 endpoint@2�PIXport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu �>�?  ��� �aclkiface+�okayIOdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi�  D �pclkhclk���dphy�Q� Qapb�� �disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi�  E �pclkhclk���dphy�R� Qapb�� �disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi�   -(���(��iahbisfrcecrefodefault eSTU� ����okay�V�WIports port@0endpoint�XIPport@1endpoint�YI�qos@fe128000,rockchip,rk3568-qossyscon�� I)qos@fe138080,rockchip,rk3568-qossyscon��� I8qos@fe138100,rockchip,rk3568-qossyscon�� I9qos@fe138180,rockchip,rk3568-qossyscon��� I:qos@fe148000,rockchip,rk3568-qossyscon�� I*qos@fe148080,rockchip,rk3568-qossyscon��� I+qos@fe148100,rockchip,rk3568-qossyscon�� I,qos@fe150000,rockchip,rk3568-qossyscon� I6qos@fe158000,rockchip,rk3568-qossyscon�� I0qos@fe158100,rockchip,rk3568-qossyscon�� I1qos@fe158180,rockchip,rk3568-qossyscon��� I2qos@fe158200,rockchip,rk3568-qossyscon�� I3qos@fe158280,rockchip,rk3568-qossyscon��� I4qos@fe158300,rockchip,rk3568-qossyscon�� I5qos@fe180000,rockchip,rk3568-qossyscon� qos@fe190000,rockchip,rk3568-qossyscon� I;qos@fe190280,rockchip,rk3568-qossyscon�� I<qos@fe190300,rockchip,rk3568-qossyscon� I=qos@fe190380,rockchip,rk3568-qossyscon�� I>qos@fe190400,rockchip,rk3568-qossyscon� I?qos@fe198000,rockchip,rk3568-qossyscon�� I7qos@fe1a8000,rockchip,rk3568-qossyscon�� I-qos@fe1a8080,rockchip,rk3568-qossyscon��� I.qos@fe1a8100,rockchip,rk3568-qossyscon�� I/pcie@fe260000,rockchip,rk3568-pcie0�@�&?�dbiapbconfig< KJIHGsyspmcmsilegacyerr�(�����$�aclk_mstaclk_slvaclk_dbipclkaux�pci�`�ZZZZ )8GO� �pcie-phy�8}>�>�>���Qpipe �okayodefaulte[ Y\ e]legacy-interrupt-controller  HIZmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc�+@  b �����biuciuciu-driveciu-sample8C�р��Qreset�okayu��odefaulte^_`a��bmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc�,@  c �����biuciuciu-driveciu-sample8C�р��Qreset�okay����c�odefault edef��"�spi@fe300000 ,rockchip,sfc�0@  exv�clk_sfchclk_sfcegodefault �disabledmmc@fe310000,rockchip,rk3568-dwcmshc�1  �{}� ��n6(|zy{}�corebusaxiblocktimer�okay ���i2s@fe400000,rockchip,rk3568-i2s-tdm�@  4�=A�F�qF�q?C9�mclk_txmclk_rxhclk�h tx�PQ Qtx-mrx-m���okayIi2s@fe410000,rockchip,rk3568-i2s-tdm�A  5�EI�F�qF�qGK:�mclk_txmclk_rxhclk�hh rxtx�RS Qtx-mrx-m�odefault0eijklmnopqrst� �disabledi2s@fe420000,rockchip,rk3568-i2s-tdm�B  6�M�F�qOO;�mclk_txmclk_rxhclk�hh txrx�TQm�odefaulteuvwx� �disabledi2s@fe430000,rockchip,rk3568-i2s-tdm�C  7SW<�mclk_txmclk_rxhclk�hh txrx�UV Qtx-mrx-m�� �disabledpdm@fe440000,rockchip,rk3568-pdm�D  LZY�pdm_clkpdm_hclk�h  rxeyz{|}~odefault�XQpdm-m� �disabledspdif@fe460000,rockchip,rk3568-spdif�F  f �mclkhclk_\�h txodefaulte� �disableddma-controller@fe530000,arm,pl330arm,primecell�S@     �apb_pclk 7I#dma-controller@fe550000,arm,pl330arm,primecell�U@    �apb_pclk 7Ihi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c�Z  /HG �i2cpclke�odefault �okayrtc@51 ,nxp,pcf85063Qi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c�[  0JI �i2cpclke�odefault  �disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c�\  1LK �i2cpclke�odefault  �disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c�]  2NM �i2cpclke�odefault  �disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c�^  3PO �i2cpclke�odefault  �disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt�`  � �tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi�a  gRQ�spiclkapb_pclk�## txrxodefault e���  �disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi�b  hTS�spiclkapb_pclk�## txrxodefault e���  �disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi�c  iVU�spiclkapb_pclk�## txrxodefault e���  �disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi�d  jXW�spiclkapb_pclk�## txrxodefault e���  �disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart�e  u�baudclkapb_pclk�## e���odefault���okay Bbluetooth,brcm,bcm43438-bt��lpo R� f� x�odefault e��� �" ��serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart�f  v# �baudclkapb_pclk�##e�odefault���okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart�g  w'$�baudclkapb_pclk�##e�odefault�� �disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart�h  x+(�baudclkapb_pclk�## e�odefault�� �disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart�i  y/,�baudclkapb_pclk�# # e�odefault�� �disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart�j  z30�baudclkapb_pclk�# # e�odefault�� �disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart�k  {74�baudclkapb_pclk�##e�odefault���okayserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart�l  |;8�baudclkapb_pclk�##e�odefault�� �disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart�m  }?<�baudclkapb_pclk�##e�odefault�� �disabledthermal-zonescpu-thermal �d �� ��tripscpu_alert0 �p ���passiveI�cpu_alert1 �$� ���passivecpu_crit �s �� �criticalcooling-mapsmap0 ��0 � �������� �������� �������� ��������gpu-thermal � �� ��tripsgpu-threshold �p ���passivegpu-target �$� ���passiveI�gpu-crit �s �� �criticalcooling-mapsmap0 �� ����������tsadc@fe710000,rockchip,rk3568-tsadc�q  s��f@ �`�tsadcapb_pclk����� �soinitdefaultsleepe� � � *�okayI�saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc�r  ]�saradcapb_pclk�� Qsaradc-apb @ �disabled R�pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm�nZY �pwmpclke�odefault� �disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm�nZY �pwmpclke�odefault� �disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm�n ZY �pwmpclke�odefault� �disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm�n0ZY �pwmpclke�odefault� �disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm�o]\ �pwmpclke�odefault� �disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm�o]\ �pwmpclke�odefault� �disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm�o ]\ �pwmpclke�odefault� �disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm�o0]\ �pwmpclke�odefault� �disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm�p`_ �pwmpclke�odefault� �disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm�p`_ �pwmpclke�odefault� �disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm�p `_ �pwmpclke�odefault� �disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm�p0`_ �pwmpclke�odefault� �disabledphy@fe830000,rockchip,rk3568-naneng-combphy��"} �refapbpipe�"����� ^� p� � �disabledIphy@fe840000,rockchip,rk3568-naneng-combphy��%~ �refapbpipe�%����� ^� p� ��okay�"Iphy@fe870000,rockchip,rk3568-csi-dphy��y�pclk ���Qapb� �disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy�� �refpclkz �� Qapb�� �disabledIQmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy�� �refpclk{ �� Qapb�� �disabledIRusb2phy@fe8a0000,rockchip,rk3568-usb2phy���phyclkRclk_usbphy0_480m  � ����okayIhost-port � �disabledIotg-port ��okay��Iusb2phy@fe8b0000,rockchip,rk3568-usb2phy���phyclkRclk_usbphy1_480m  � ��� �disabledhost-port � �disabledIotg-port � �disabledIpinctrl,rockchip,rk3568-pinctrl� �� }gpio@fdd60000,rockchip,gpio-bank��  !.  � �I gpio@fe740000,rockchip,gpio-bank�t  "cd � �I\gpio@fe750000,rockchip,gpio-bank�u  #ef � �I�gpio@fe760000,rockchip,gpio-bank�v  $gh � �gpio@fe770000,rockchip,gpio-bank�w  %ij � �pcfg-pull-up �I�pcfg-pull-down �I�pcfg-pull-none �I�pcfg-pull-none-drv-level-1 � �I�pcfg-pull-none-drv-level-2 � �I�pcfg-pull-none-drv-level-3 � �I�pcfg-pull-up-drv-level-1 � �I�pcfg-pull-up-drv-level-2 � �I�pcfg-pull-none-smt � I�acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 �I cpuebcedpdpemmceth0eth1flashfspifspi-pins` ������Iggmac0gmac1gmac1m0-miim ��IHgmac1m0-clkinout �ILgmac1m0-rx-bus20  � � �IJgmac1m0-tx-bus20  ���IIgmac1m0-rgmii-clk ��IKgmac1m0-rgmii-bus@ ����IMgpuhdmitxhdmitxm0-cec �IUhdmitx-scl �IShdmitx-sda �ITi2c0i2c0-xfer  � �Ii2c1i2c1-xfer  � �I�i2c2i2c2m1-xfer  � �I�i2c3i2c3m0-xfer ��I�i2c4i2c4m1-xfer  � �I�i2c5i2c5m0-xfer  � �I�i2s1i2s1m1-lrckrx �Ili2s1m1-lrcktx �Iki2s1m1-sclkrx �Iji2s1m1-sclktx �Iii2s1m1-sdi0 �Imi2s1m1-sdi1 �Ini2s1m1-sdi2 �Ioi2s1m1-sdi3 �Ipi2s1m1-sdo0 �Iqi2s1m1-sdo1 �Iri2s1m1-sdo2  �Isi2s1m1-sdo3  �Iti2s2i2s2m0-lrcktx �Ivi2s2m0-sclktx �Iui2s2m0-sdi �Iwi2s2m0-sdo �Ixi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk �Iypdmm0-clk1 �Izpdmm0-sdi0  �I{pdmm0-sdi1  �I|pdmm0-sdi2  �I}pdmm0-sdi3 �I~pmicpmic-int-l �I!pmupwm0pwm0m0-pins �I%pwm1pwm1m0-pins �I&pwm2pwm2m0-pins �I'pwm3pwm3-pins �I(pwm4pwm4-pins �I�pwm5pwm5-pins �I�pwm6pwm6-pins �I�pwm7pwm7-pins �I�pwm8pwm8m0-pins  �I�pwm9pwm9m0-pins  �I�pwm10pwm10m0-pins  �I�pwm11pwm11m0-pins �I�pwm12pwm12m0-pins �I�pwm13pwm13m0-pins �I�pwm14pwm14m0-pins �I�pwm15pwm15m0-pins �I�refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ����I^sdmmc0-clk �I_sdmmc0-cmd �I`sdmmc0-det �Iasdmmc1sdmmc1-bus4@ ����Idsdmmc1-clk �Ifsdmmc1-cmd �Iesdmmc2spdifspdifm0-tx �Ispi0spi0m0-pins0  ���I�spi0m0-cs0 �I�spi0m0-cs1 �I�spi1spi1m0-pins0  ���I�spi1m0-cs0 �I�spi1m0-cs1 �I�spi2spi2m0-pins0 ���I�spi2m0-cs0 �I�spi2m0-cs1 �I�spi3spi3m0-pins0  �� �I�spi3m0-cs0 �I�spi3m0-cs1 �I�tsadctsadc-shutorg �I�tsadc-pin �I�uart0uart0-xfer ��I$uart1uart1m0-xfer  � �I�uart1m0-ctsn �I�uart1m0-rtsn  �I�uart2uart2m0-xfer ��I�uart3uart3m0-xfer ��I�uart4uart4m0-xfer ��I�uart5uart5m0-xfer ��I�uart6uart6m0-xfer ��I�uart7uart7m2-xfer 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)vcc3v0_sd}�82Z�P2Z��"vcc3v3-pcie-regulator,regulator-fixed )vcc3v3_pcie}�82Z�P2Z���I]vcc12v-pcie-regulator,regulator-fixed )vcc12v_pcie}�8�P��� interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-init-microvoltregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplybus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybroken-cdbus-widthcap-sd-highspeeddisable-wpvqmmc-supplyvmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr50mmc-hs200-1_8vdma-namesarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathlabeldefault-statelinux,default-triggerretain-state-suspendedenable-active-high