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(rev5+)(2google,zoglingoogle,hoglinqcom,sc7280chosen=serial0:115200n8aliases!I/soc@0/geniqup@9c0000/i2c@980000!N/soc@0/geniqup@9c0000/i2c@984000!S/soc@0/geniqup@9c0000/i2c@988000!X/soc@0/geniqup@9c0000/i2c@98c000!]/soc@0/geniqup@9c0000/i2c@990000!b/soc@0/geniqup@9c0000/i2c@994000!g/soc@0/geniqup@9c0000/i2c@998000!l/soc@0/geniqup@9c0000/i2c@99c000!q/soc@0/geniqup@ac0000/i2c@a80000!v/soc@0/geniqup@ac0000/i2c@a84000!{/soc@0/geniqup@ac0000/i2c@a88000!�/soc@0/geniqup@ac0000/i2c@a8c000!�/soc@0/geniqup@ac0000/i2c@a90000!�/soc@0/geniqup@ac0000/i2c@a94000!�/soc@0/geniqup@ac0000/i2c@a98000!�/soc@0/geniqup@ac0000/i2c@a9c000�/soc@0/mmc@7c4000�/soc@0/mmc@8804000!�/soc@0/geniqup@9c0000/spi@980000!�/soc@0/geniqup@9c0000/spi@984000!�/soc@0/geniqup@9c0000/spi@988000!�/soc@0/geniqup@9c0000/spi@98c000!�/soc@0/geniqup@9c0000/spi@990000!�/soc@0/geniqup@9c0000/spi@994000!�/soc@0/geniqup@9c0000/spi@998000!�/soc@0/geniqup@9c0000/spi@99c000!�/soc@0/geniqup@ac0000/spi@a80000!�/soc@0/geniqup@ac0000/spi@a84000!�/soc@0/geniqup@ac0000/spi@a88000!�/soc@0/geniqup@ac0000/spi@a8c000!�/soc@0/geniqup@ac0000/spi@a90000!�/soc@0/geniqup@ac0000/spi@a94000!�/soc@0/geniqup@ac0000/spi@a98000!�/soc@0/geniqup@ac0000/spi@a9c000.�/soc@0/geniqup@9c0000/serial@99c000/bluetooth$ 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=cpu-mapcluster0core0�core1�core2�core3�core4�core5�core6�core7�idle-states�pscicpu-sleep-0-02arm,idle-state�little-power-down@%%6�F�W=cpu-sleep-0-12arm,idle-state�little-rail-power-down@%�6�F�W=cpu-sleep-1-02arm,idle-state�big-power-down@% 6�F�W=cpu-sleep-1-12arm,idle-state�big-rail-power-down@%6>F�W=cluster-sleep-02arm,idle-state�cluster-power-down@4D% �6�F&�W=opp-table-cpu02operating-points-v2h=opp-300000000s�z 5�|opp-691200000s)2�z 5�opp-806400000s0�z 5>�opp-940800000s8xz��wopp-1152000000sD� z!b���opp-1324800000sN��z!b��opp-1516800000sZh�z.�E@opp-1651200000sbkPz.�}�opp-1804800000sk�z>��opp-1958400000st��z>��opp-2016000000sx)�z^���opp-table-cpu42operating-points-v2h=opp-691200000s)2�z���|opp-940800000s8xz!b��opp-1228800000sI>z>�wopp-1344000000sP�z>�wopp-1516800000sZh�z>�wopp-1651200000sbkPz^��E@opp-1900800000sqK�z^���`opp-2054400000szs�z^���`opp-2112000000s}�z^���`opp-2131200000s�z^���`opp-2208000000s��hz^���`opp-2400000000s� z�0 �opp-2611200000s���z�0 �opp-table-cpu72operating-points-v2h=opp-806400000s0�z���|opp-1056000000s>�Hz!b��opp-1324800000sN��z>�wopp-1516800000sZh�z>�wopp-1766400000siI z^��E@opp-1862400000so�z^��E@opp-2035200000syN�z^��E@opp-2112000000s}�z^���`opp-2208000000s��hz^���`opp-2380800000s�� zh?��`opp-2400000000s� z�0 �opp-2515200000s���z�0 �opp-2707200000s�\�z�0 �opp-3014400000s��z�0 �memory@80000000pmemoryS�firmwarescm2qcom,scm-sc7280qcom,scminterconnect2qcom,sc7280-clk-virt��=<smem 2qcom,smem� �!smp2p-adsp 2qcom,smp2p����" �"��master-kernelmaster-kernelslave-kernel slave-kernel-Bsmp2p-cdsp 2qcom,smp2p�^��" �"��master-kernelmaster-kernelslave-kernel slave-kernel-Bsmp2p-mpss 2qcom,smp2p����" �"��master-kernelmaster-kernel=�slave-kernel slave-kernel-B=�ipa-ap-to-modemipa=�ipa-modem-to-apipa-B=�smp2p-wpss 2qcom,smp2p�ih�" �"�� master-kernelmaster-kernel=0slave-kernel slave-kernel-B=.pmu2arm,armv8-pmuv3 Spsci 2arm,psci-1.0�smcopp-table-qspi2operating-points-v2=*opp-75000000sxh�^#opp-150000000s�р^$opp-200000000s ��^%opp-300000000s�^&opp-table-qup2operating-points-v2=Copp-75000000sxh�^#opp-100000000s��^$opp-128000000s� ^&soc@0 El 2simple-busclock-controller@1000002qcom,gcc-sc7280S,w''()�~bi_tcxobi_tcxo_aosleep_clkpcie_0_pipe_clkpcie_1_pipe_clkufs_phy_rx_symbol_0_clkufs_phy_rx_symbol_1_clkufs_phy_tx_symbol_0_clkusb3_phy_wrapper_gcc_usb30_pipe_clk0���*=+mailbox@4080002qcom,sc7280-ipccqcom,ipccS@� S�-B�="efuse@7840002qcom,sc7280-qfpromqcom,qfprom@Sx@ x x  x`�w+�~core�* �,gpu_speed_bin@1e9S��=�mmc@7c4000$2qcom,sc7280-sdhciqcom,sdhci-msm-v5�defaultsleep�-./0�1234�okay S|@|P �hccqhci 5�S��hc_irqpwr_irqw+l+m'~ifacecorexo0�67sdhc-ddrcpu-sdhc�*�82<Id,Y�hiv���+�9�:���opp-table2operating-points-v2=8opp-100000000s��^#zw@����opp-384000000s�`^&zRe�j��pdma-controller@900000�2qcom,sc7280-gpi-dmaS��S������������  56 �disabled==geniqup@9c00002qcom,geni-se-qupS� w+h+i ~m-ahbs-ahb E 5#�okayi2c@9800002qcom,geni-i2cS�@w+F~se�default�; SY H�<<76qup-corequp-configqup-memory  ==%txrx�okay �trackpad@15 2hid-over-i2cS�default�>?S/FU@`spi@9800002qcom,geni-spiS�@w+F~se�default�AB SY �*�C0�<<7qup-corequp-config  ==%txrx �disabledserial@9800002qcom,geni-uartS�@w+F~se�default�DEFG SY�*�C0�<<7qup-corequp-config �disabledi2c@9840002qcom,geni-i2cS�@@w+H~se�default�H SZ H�<<76qup-corequp-configqup-memory  ==%txrx�okay �proximity@282semtech,sx9324S(n�default�I?S�UJ�proximity-wifi_cellular-0�okayproximity@2c2semtech,sx9324S,n�default�K?S�UJ�proximity-wifi_cellular-1�okayspi@9840002qcom,geni-spiS�@@w+H~se�default�LM SZ �*�C0�<<7qup-corequp-config  ==%txrx �disabledserial@9840002qcom,geni-uartS�@@w+H~se�default�NOPQ SZ�*�C0�<<7qup-corequp-config �disabledi2c@9880002qcom,geni-i2cS��@w+J~se�default�R S[ H�<<76qup-corequp-configqup-memory  ==%txrx �disabledspi@9880002qcom,geni-spiS��@w+J~se�default�ST S[ �*�C0�<<7qup-corequp-config  ==%txrx �disabledserial@9880002qcom,geni-uartS��@w+J~se�default�UVWX S[�*�C0�<<7qup-corequp-config �disabledi2c@98c0002qcom,geni-i2cS��@w+L~se�default�Y S\ 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�disabledserial@9980002qcom,geni-uartS��@w+R~se�default�qrst S_�*�C0�<<7qup-corequp-config �disabledi2c@99c0002qcom,geni-i2cS��@w+T~se�default�u S` H�<<76qup-corequp-configqup-memory  ==%txrx �disabledspi@99c0002qcom,geni-spiS��@w+T~se�default�vw S` �*�C0�<<7qup-corequp-config  ==%txrx �disabledserial@99c0002qcom,geni-uartS��@w+T~se�defaultsleep�xyz{�*�C0�<<7qup-corequp-config�okay�`?�|}~bluetooth2qcom,wcn6750-bt�default�� �?U �?V��������������"�/0�dma-controller@a00000�2qcom,sc7280-gpi-dmaS��S%&'()*  5V �disabled=�geniqup@ac00002qcom,geni-se-qupS� w+j+k ~m-ahbs-ahb E 5C�okayi2c@a800002qcom,geni-i2cS�@w+X~se�default�� Sa H�<<7�qup-corequp-configqup-memory  ��%txrx �disabledspi@a800002qcom,geni-spiS�@w+X~se�default��� Sa �*�C0�<<7qup-corequp-config  ��%txrx �disabledserial@a800002qcom,geni-uartS�@w+X~se�default����� Sa�*�C0�<<7qup-corequp-config �disabledi2c@a840002qcom,geni-i2cS�@@w+Z~se�default�� Sb H�<<7�qup-corequp-configqup-memory  ��%txrx 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qup11=�qup-i2c10-data-clk-pins gpio40gpio41 qup12=�qup-i2c11-data-clk-pins gpio44gpio45 qup13=�qup-i2c12-data-clk-pins gpio48gpio49 qup14=�qup-i2c13-data-clk-pins gpio52gpio53 qup15 2 #=�qup-i2c14-data-clk-pins gpio56gpio57 qup16 2 #=�qup-i2c15-data-clk-pins gpio60gpio61 qup17=�qup-spi0-data-clk-pins gpio0gpio1gpio2 qup00=Aqup-spi0-cs-pins gpio3 qup00=Bqup-spi0-cs-gpio-pins gpio3 gpioqup-spi1-data-clk-pins gpio4gpio5gpio6 qup01=Lqup-spi1-cs-pins gpio7 qup01=Mqup-spi1-cs-gpio-pins gpio7 gpioqup-spi2-data-clk-pins gpio8gpio9gpio10 qup02=Squp-spi2-cs-pins gpio11 qup02=Tqup-spi2-cs-gpio-pins gpio11 gpioqup-spi3-data-clk-pins gpio12gpio13gpio14 qup03=Zqup-spi3-cs-pins gpio15 qup03=[qup-spi3-cs-gpio-pins gpio15 gpioqup-spi4-data-clk-pins gpio16gpio17gpio18 qup04=aqup-spi4-cs-pins gpio19 qup04=bqup-spi4-cs-gpio-pins gpio19 gpioqup-spi5-data-clk-pins gpio20gpio21gpio22 qup05=hqup-spi5-cs-pins gpio23 qup05=iqup-spi5-cs-gpio-pins gpio23 gpioqup-spi6-data-clk-pins gpio24gpio25gpio26 qup06=oqup-spi6-cs-pins gpio27 qup06=pqup-spi6-cs-gpio-pins gpio27 gpioqup-spi7-data-clk-pins gpio28gpio29gpio30 qup07=vqup-spi7-cs-pins gpio31 qup07=wqup-spi7-cs-gpio-pins gpio31 gpioqup-spi8-data-clk-pins gpio32gpio33gpio34 qup10=�qup-spi8-cs-pins gpio35 qup10=�qup-spi8-cs-gpio-pins gpio35 gpioqup-spi9-data-clk-pins gpio36gpio37gpio38 qup11 2 #=�qup-spi9-cs-pins gpio39 qup11qup-spi9-cs-gpio-pins gpio39 gpio 2 #=�qup-spi10-data-clk-pins gpio40gpio41gpio42 qup12 2 #=�qup-spi10-cs-pins gpio43 qup12qup-spi10-cs-gpio-pins gpio43 gpio 2 #=�qup-spi11-data-clk-pins gpio44gpio45gpio46 qup13=�qup-spi11-cs-pins gpio47 qup13=�qup-spi11-cs-gpio-pins gpio47 gpioqup-spi12-data-clk-pins gpio48gpio49gpio50 qup14=�qup-spi12-cs-pins gpio51 qup14=�qup-spi12-cs-gpio-pins gpio51 gpioqup-spi13-data-clk-pins gpio52gpio53gpio54 qup15=�qup-spi13-cs-pins gpio55 qup15=�qup-spi13-cs-gpio-pins gpio55 gpioqup-spi14-data-clk-pins gpio56gpio57gpio58 qup16=�qup-spi14-cs-pins gpio59 qup16=�qup-spi14-cs-gpio-pins gpio59 gpioqup-spi15-data-clk-pins gpio60gpio61gpio62 qup17=�qup-spi15-cs-pins gpio63 qup17=�qup-spi15-cs-gpio-pins gpio63 gpioqup-uart0-cts-pins gpio0 qup00=Dqup-uart0-rts-pins gpio1 qup00=Equp-uart0-tx-pins gpio2 qup00=Fqup-uart0-rx-pins gpio3 qup00=Gqup-uart1-cts-pins gpio4 qup01=Nqup-uart1-rts-pins gpio5 qup01=Oqup-uart1-tx-pins gpio6 qup01=Pqup-uart1-rx-pins gpio7 qup01=Qqup-uart2-cts-pins gpio8 qup02=Uqup-uart2-rts-pins gpio9 qup02=Vqup-uart2-tx-pins gpio10 qup02=Wqup-uart2-rx-pins gpio11 qup02=Xqup-uart3-cts-pins gpio12 qup03=\qup-uart3-rts-pins gpio13 qup03=]qup-uart3-tx-pins gpio14 qup03=^qup-uart3-rx-pins gpio15 qup03=_qup-uart4-cts-pins gpio16 qup04=cqup-uart4-rts-pins gpio17 qup04=dqup-uart4-tx-pins gpio18 qup04=equp-uart4-rx-pins gpio19 qup04=fqup-uart5-cts-pins gpio20 qup05=jqup-uart5-rts-pins gpio21 qup05=kqup-uart5-tx-pins gpio22 qup05 2 #=lqup-uart5-rx-pins gpio23 qup05 =mqup-uart6-cts-pins gpio24 qup06=qqup-uart6-rts-pins gpio25 qup06=rqup-uart6-tx-pins gpio26 qup06=squp-uart6-rx-pins gpio27 qup06=tqup-uart7-cts-pins gpio28 qup07 X=xqup-uart7-rts-pins gpio29 qup07 2 #=yqup-uart7-tx-pins gpio30 qup07 2 #=zqup-uart7-rx-pins gpio31 qup07 ={qup-uart8-cts-pins gpio32 qup10=�qup-uart8-rts-pins gpio33 qup10=�qup-uart8-tx-pins gpio34 qup10=�qup-uart8-rx-pins gpio35 qup10=�qup-uart9-cts-pins gpio36 qup11=�qup-uart9-rts-pins gpio37 qup11=�qup-uart9-tx-pins gpio38 qup11=�qup-uart9-rx-pins gpio39 qup11=�qup-uart10-cts-pins gpio40 qup12=�qup-uart10-rts-pins gpio41 qup12=�qup-uart10-tx-pins gpio42 qup12=�qup-uart10-rx-pins gpio43 qup12=�qup-uart11-cts-pins gpio44 qup13=�qup-uart11-rts-pins gpio45 qup13=�qup-uart11-tx-pins gpio46 qup13=�qup-uart11-rx-pins gpio47 qup13=�qup-uart12-cts-pins gpio48 qup14=�qup-uart12-rts-pins gpio49 qup14=�qup-uart12-tx-pins gpio50 qup14=�qup-uart12-rx-pins gpio51 qup14=�qup-uart13-cts-pins gpio52 qup15=�qup-uart13-rts-pins gpio53 qup15=�qup-uart13-tx-pins gpio54 qup15=�qup-uart13-rx-pins gpio55 qup15=�qup-uart14-cts-pins gpio56 qup16=�qup-uart14-rts-pins gpio57 qup16=�qup-uart14-tx-pins gpio58 qup16=�qup-uart14-rx-pins gpio59 qup16=�qup-uart15-cts-pins gpio60 qup17=�qup-uart15-rts-pins gpio61 qup17=�qup-uart15-tx-pins gpio62 qup17=�qup-uart15-rx-pins gpio63 qup17=�sdc1-clk-pins sdc1_clk 2 #=-sdc1-cmd-pins sdc1_cmd  # =.sdc1-data-pins sdc1_data  # =/sdc1-rclk-pins sdc1_rclk ?=0sdc1-clk-sleep-pins sdc1_clk # X=1sdc1-cmd-sleep-pins sdc1_cmd # X=2sdc1-data-sleep-pins sdc1_data # X=3sdc1-rclk-sleep-pins sdc1_rclk # X=4sdc2-clk-pins sdc2_clk 2 #=sdc2-cmd-pins sdc2_cmd  # =sdc2-data-pins sdc2_data  # =sdc2-clk-sleep-pins sdc2_clk # X= sdc2-cmd-sleep-pins sdc2_cmd # X=!sdc2-data-sleep-pins sdc2_data # X="mos-bt-en-pins gpio85 gpio # �=�qup-uart7-sleep-cts-pins gpio28 gpio X=|qup-uart7-sleep-rts-pins gpio29 gpio ?=}qup-uart7-sleep-rx-pins gpio31 gpio =qup-uart7-sleep-tx-pins gpio30 gpio =~ts-int-conn-pins gpio55 gpio =�ts-rst-conn-pins gpio54 gpio # =�us-euro-hs-sel gpio81 gpio ? #={wcd-reset-n gpio83 gpio #=zwcd-reset-n-sleep gpio83 gpio # 2=|amp-en-pins gpio63 gpio 2 #=�ap-ec-int-l-pins gpio18 gpio =�bios-flash-wp-od-pins gpio16 gpio 2=Xen-fp-rails-pins gpio77 gpio 2 # =�en-pp3300-codec-pins gpio105 gpio 2 #=�en-pp3300-dx-edp-pins gpio80 gpio 2 #=�fp-rst-l-pins gpio78 gpio 2 #=�fp-to-ap-irq-l-pins gpio61 gpio 2=�fpmcu-boot0-pins gpio68 gpio 2=�gsc-ap-int-odl-pins gpio104 gpio =�hp-irq-pins gpio101 gpio hub-en-pins gpio157 gpio 2 #=�pe-wake-odl-pins gpio3 gpio 2 #=�qup-spi9-cs-gpio-init-high-pins gpio39 gpio =�qup-spi10-cs-gpio-init-high-pins gpio43 gpio =�sar0-irq-odl-pins gpio141 gpio =Isar1-irq-odl-pins gpio140 gpio =Ksd-cd-odl-pins gpio91 gpio =ssd-en-pins gpio51 gpio 2 #=�ssd-rst-l-pins gpio2 gpio 2 # �=�tp-int-odl-pins gpio7 gpio 2=>wf-cam-en-pins gpio119 gpio 2 #=�sram@146a5000#2qcom,sc7280-imemsysconsimple-mfdSjP` EjP`pil-reloc@594c2qcom,pil-reloc-infoSYL�iommu@15000000!2qcom,sc7280-smmu-500arm,mmu-500S � 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interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-pathi2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11i2c12i2c13i2c14i2c15mmc1mmc2spi0spi1spi2spi3spi4spi5spi6spi7spi8spi9spi10spi11spi12spi13spi14spi15bluetooth0serial0serial1wifi0clock-frequency#clock-cellsphandlerangesno-mapregqcom,client-idqcom,vmiddevice_typeenable-methodcpu-idle-statesnext-level-cacheoperating-points-v2interconnectsqcom,freq-domain#cooling-cellscpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-peak-kBps#interconnect-cellsqcom,bcm-votersmemory-regionhwlocksqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsinterruptsrequired-oppsdma-rangesclocksclock-names#reset-cells#power-domain-cellspower-domains#mbox-cellsvcc-supplybitspinctrl-namespinctrl-0pinctrl-1statusreg-namesiommusinterrupt-namesinterconnect-namesbus-widthsupports-cqeqcom,dll-configqcom,ddr-configmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vmmc-hs400-enhanced-stroberesetsvmmc-supplyvqmmc-supplynon-removableno-sdno-sdioopp-avg-kBps#dma-cellsdma-channelsdma-channel-maskdmasdma-namespost-power-on-delay-mshid-descr-addrvdd-supplywakeup-source#io-channel-cellslabelenable-gpiosswctrl-gpiosvddaon-supplyvddbtcxmx-supplyvddrfacmn-supplyvddrfa0p8-supplyvddrfa1p7-supplyvddrfa1p2-supplyvddrfa2p2-supplyvddasd-supplyvddio-supplymax-speedcs-gpiosspi-max-frequency#pwm-cellsgoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countpower-roledata-roletry-power-rolekeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapfunction-row-physmapqcom,rproclinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-ratesreset-namesphysphy-namesdma-coherentiommu-mapperst-gpiosvddpe-3v3-supplyvdda-phy-supplyvdda-pll-supply#phy-cellsclock-output-namesqcom,qmpqcom,smem-statesqcom,smem-state-namesmodem-init#hwlock-cellspower-domain-names#sound-dai-cellsqcom,din-portsqcom,dout-portsqcom,ports-word-lengthqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2qcom,ports-lane-controlqcom,ports-block-pack-modeqcom,ports-hstartqcom,ports-hstopqcom,ports-block-group-countqcom,rx-port-mappingqcom,port-offsetqcom,tx-port-mappingvdd-micb-supplyqcom,playback-sd-linesqcom,adsp-bypass-modegpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthbias-disablebias-pull-downslew-ratebias-bus-holdqcom,gmunvmem-cellsnvmem-cell-namesopp-levelopp-supported-hw#iommu-cells#global-interruptsqcom,halt-regsqcom,ext-regsqcom,qaccept-regsfirmware-nameremote-endpointarm,scatter-gatherqcom,replicator-loses-contextarm,coresight-loses-context-with-cpuqcom,skip-power-upcd-gpiosvdda33-supplyvdda18-supplysnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkmaximum-speedusb-role-switchspi-tx-bus-widthspi-rx-bus-widthdr_modepeer-hubassigned-clock-parentsbacklightpower-supplydata-lanesqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channelgpio-line-namesqcom,drive-strengthoutput-lowpower-sourcelinux,codeqcom,pre-scalingwakeup-parentbias-pull-upoutput-highmsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idregulator-min-microvoltregulator-max-microvoltregulator-initial-mode#freq-domain-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-gpiosus-euro-gpiosqcom,rx-deviceqcom,tx-devicevdd-rxtx-supplyvdd-io-supplyvdd-buck-supplyvdd-mic-bias-supplyqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltpwmsregulator-nameregulator-always-onregulator-boot-onvin-supplygpioenable-active-highsdmode-gpiosmax-brightnessaudio-routingqcom,msm-mbhc-hphl-swhqcom,msm-mbhc-gnd-swhlink-namesound-dai