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�n6�timer@ff810000rockchip,rk3288-timer��  �H ?a  �pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshc �р ?�Drv�biuciuciu-driveciu-sample � � @�%reset1okay8BTe�w�default� ������mmc@ff0d0000rockchip,rk3288-dw-mshc �р ?�Esw�biuciuciu-driveciu-sample �!� @�%reset 1disabledmmc@ff0e0000rockchip,rk3288-dw-mshc �р ?�Ftx�biuciuciu-driveciu-sample �"�@�%reset 1disabledmmc@ff0f0000rockchip,rk3288-dw-mshc �р ?�Guy�biuciuciu-driveciu-sample �#�@�%reset1okay8Bw��default���saradc@ff100000rockchip,saradc� �$�?I[�saradcapb_pclkW %saradc-apb1okayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi?AR�spiclkapb_pclk  txrx �,�default�� 1disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi?BS�spiclkapb_pclk txrx �-�default� !� 1disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi?CT�spiclkapb_pclktxrx �.�default�"#$%�1okayflash@0 micron,n25q128a13jedec,spi-nor#���51okayi2c@ff140000rockchip,rk3288-i2c� �>�i2c?M�default�&1okaytouchscreen@44 st,stmpe811Dadc@64maxim,max1037drtc@68rv4162h�default�'&(� i2c@ff150000rockchip,rk3288-i2c� �?�i2c?O�default�)1okayeeprom@51 atmel,24c32QD i2c@ff160000rockchip,rk3288-i2c� �@�i2c?P�default�*1okayleddimmer@62 nxp,pca9533bled1 Mred:user1Snone�led2 Mgreen:user2Snone�led3 Mblue:user3Snone�led4 Mred:user4Snone�i2c@ff170000rockchip,rk3288-i2c� �A�i2c?Q�default�+1okay`tserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart� �7is?MU�baudclkapb_pclktxrx�default �,-.1okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart� �8is?NV�baudclkapb_pclktxrx�default�/ 1disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart�i �9is?OW�baudclkapb_pclk�default�01okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart� �:is?PX�baudclkapb_pclktxrx�default�1 1disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart� �;is?QY�baudclkapb_pclk  txrx�default�2 1disableddma-controller@ff250000arm,pl330arm,primecell�%@����?� �apb_pclk`thermal-zonesreserve-thermal�����3cpu-thermal�d���3tripscpu_alert0�p���passive`4cpu_alert1�$����passive`5cpu_crit�_��� �criticalcooling-mapsmap040 ����������������map150 ��������������������������������gpu-thermal�d���3tripsgpu_alert0�p���passive`6gpu_crit�_��� �criticalcooling-mapsmap06  7��������tsadc@ff280000rockchip,rk3288-tsadc�( �%?HZ�tsadcapb_pclk� %tsadc-apb�initdefaultsleep�89&80F:Ss1okayj�`3ethernet@ff290000rockchip,rk3288-gmac�)��macirqeth_wake_irqF:8?�fgc��]M�stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB %stmmaceth1okay���;�input�default �<=>�?�@ �rgmii-id� 'B@ *A:Cmdio0snps,dwmac-mdioethernet-phy@0ethernet-phy-ieee802.3-c22&A�Lav��`?usb@ff500000 generic-ehci�P �?��B�usb1okayusb@ff520000 generic-ohci�R �)?��B�usb 1disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2�T �?��otg�host�C �usb2-phy�1okayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2�X �?��otg�otg�����@@ �D �usb2-phy1okayusb@ff5c0000 generic-ehci�\ �?� 1disableddma-controller@ff600000arm,pl330arm,primecell�`@����?� �apb_pclk 1disabledi2c@ff650000rockchip,rk3288-i2c�e �<�i2c?L�default�E1okay��pmic@1crockchip,rk818&F��default�G +�9HEHQH]HiIvH�J�J��regulatorsDCDC_REG1�vdd_log�������regulator-state-memDCDC_REG2�vdd_gpu��� 5�regulator-state-mem1IB@DCDC_REG3�vcc_ddr��regulator-state-mem1DCDC_REG4 �vdd_3v3_io���2Z�2Z�`regulator-state-mem1I2Z�DCDC_BOOST�vdd_sys���LK@LK@`Hregulator-state-mem1ILK@SWITCH_REG�vdd_sd��`regulator-state-memLDO_REG2 �vdd_eth_2v5���&%�&%�`@regulator-state-mem1I&%�LDO_REG3�vdd_1v0���B@B@regulator-state-mem1IB@LDO_REG4�vdd_1v8_lcd_ldo���w@w@regulator-state-mem1Iw@LDO_REG6 �vdd_1v0_lcd���B@B@regulator-state-mem1IB@LDO_REG7 �vdd_1v8_ldo���w@w@`regulator-state-memIw@LDO_REG9 �vdd_io_sd���w@2Z�`regulator-state-memeeprom@50 atmel,24c32PD regulator@60 fcs,fan53555`e���,�vdd_cpu� 5���@�Hi2c@ff660000rockchip,rk3288-i2c�f �=�i2c?N�default�K 1disabledpwm@ff680000rockchip,rk3288-pwm�h��default�L?_ 1disabledpwm@ff680010rockchip,rk3288-pwm�h��default�M?_1okaypwm@ff680020rockchip,rk3288-pwm�h ��default�N?_ 1disabledpwm@ff680030rockchip,rk3288-pwm�h0��default�O?_ 1disabledsram@ff700000 mmio-sram�p���p�smp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sram�rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd�s`power-controller!rockchip,rk3288-power-controller��h� `apower-domain@9 �?��������������chgfdehilkj$�PQRSTUVWX�power-domain@11 ?�op�YZ�power-domain@12 ?���[�power-domain@13 ?��\]�reboot-modesyscon-reboot-mode���RB��RB�RB� RB�syscon@ff740000rockchip,rk3288-sgrfsyscon�tclock-controller@ff760000rockchip,rk3288-cru�v? �xin24mF:�!H���j��k$.#g��ׄ�e��рxh���рxh�`syscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd�w`:edp-phyrockchip,rk3288-dp-phy?h�24mC 1disabled`qio-domains"rockchip,rk3288-io-voltage-domain1okayN\jJx������usbphyrockchip,rk3288-usb-phy1okayusb-phy@320C ?]�phyclk�� %phy-reset`Dusb-phy@334C4?^�phyclk�� %phy-reset`Busb-phy@348CH?_�phyclk�� %phy-reset`Cwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt��?p �O1okaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif���?T� �mclkhclk^tx �6�default�_F: 1disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s��� �5?R��i2s_clki2s_hclk^^txrx�default�`�� 1disabledcrypto@ff8a0000rockchip,rk3288-crypto��@ �0 ?��}��aclkhclksclkapb_pclk� %crypto-rstiommu@ff900800rockchip,iommu��@ �?�� �aclkiface  1disablediommu@ff914000rockchip,iommu ��@��P �?�� �aclkiface  # 1disabledrga@ff920000rockchip,rk3288-rga��� �?��j�aclkhclksclk >a ilm %coreaxiahbvop@ff930000rockchip,rk3288-vop ����� �?����aclk_vopdclk_vophclk_vop >a def %axiahbdclk Lb1okayport` endpoint@0 Sc`uendpoint@1 Sd`rendpoint@2 Se`lendpoint@3 Sf`oiommu@ff930300rockchip,iommu�� �?�� �aclkiface >a  1okay`bvop@ff940000rockchip,rk3288-vop ����� �?����aclk_vopdclk_vophclk_vop >a ��� %axiahbdclk Lg1okayport` endpoint@0 Sh`vendpoint@1 Si`sendpoint@2 Sj`mendpoint@3 Sk`piommu@ff940300rockchip,iommu�� �?�� �aclkiface >a  1okay`gmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi��@ �?~d �refpclk >a F: 1disabledportsportendpoint@0 Sl`eendpoint@1 Sm`jlvds@ff96c000rockchip,rk3288-lvds���@?g �pclk_lvds�lcdc�n >a F: 1disabledportsport@0endpoint@0 So`fendpoint@1 Sp`kdp@ff970000rockchip,rk3288-dp��@ �b?ic�dppclk�q�dp >a o%dpF: 1disabledportsport@0endpoint@0 Sr`dendpoint@1 Ss`ihdmi@ff980000rockchip,rk3288-dw-hdmi��s�F: �g?hmn�iahbisfrcec >a 1okay ctportsportendpoint@0 Su`cendpoint@1 Sv`hvideo-codec@ff9a0000rockchip,rk3288-vpu���   �vepuvdpu?�� �aclkhclk Lw >a iommu@ff9a0800rockchip,iommu�� � ?�� �aclkiface  >a `wiommu@ff9c0440rockchip,iommu ��@@���@ �o?�� �aclkiface  1disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760��$� �jobmmugpu?�x" >a  1disabled`7opp-table-1operating-points-v2`xopp-100000000s��z~�opp-200000000s ��z~�opp-300000000s�zB@opp-400000000sׄz��opp-600000000s#�Fz�qos@ffaa0000rockchip,rk3288-qossyscon�� `\qos@ffaa0080rockchip,rk3288-qossyscon��� `]qos@ffad0000rockchip,rk3288-qossyscon�� `Qqos@ffad0100rockchip,rk3288-qossyscon�� `Rqos@ffad0180rockchip,rk3288-qossyscon��� `Sqos@ffad0400rockchip,rk3288-qossyscon�� `Tqos@ffad0480rockchip,rk3288-qossyscon��� `Uqos@ffad0500rockchip,rk3288-qossyscon�� `Pqos@ffad0800rockchip,rk3288-qossyscon�� `Vqos@ffad0880rockchip,rk3288-qossyscon��� `Wqos@ffad0900rockchip,rk3288-qossyscon�� `Xqos@ffae0000rockchip,rk3288-qossyscon�� `[qos@ffaf0000rockchip,rk3288-qossyscon�� `Yqos@ffaf0080rockchip,rk3288-qossyscon��� `Zdma-controller@ffb20000arm,pl330arm,primecell��@����?� �apb_pclk`^efuse@ffb40000rockchip,rk3288-efuse�� ?q �pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400 o �@���� ��@ ��`  � `pinctrlrockchip,rk3288-pinctrlF:��gpio@ff750000rockchip,gpio-bank�u �Q?@ � � o �`Fgpio@ff780000rockchip,gpio-bank�x �R?A � � o �gpio@ff790000rockchip,gpio-bank�y �S?B � � o �`�gpio@ff7a0000rockchip,gpio-bank�z �T?C � � o �gpio@ff7b0000rockchip,gpio-bank�{ �U?D � � o �`Agpio@ff7c0000rockchip,gpio-bank�| �V?E � � o �`(gpio@ff7d0000rockchip,gpio-bank�} �W?F � � o �gpio@ff7e0000rockchip,gpio-bank�~ �X?G � � o �`�gpio@ff7f0000rockchip,gpio-bank� �Y?H � � o �`�hdmihdmi-cec-c0 �yhdmi-cec-c7 �yhdmi-ddc �yyhdmi-ddc-unwedge �zypcfg-output-low �`zpcfg-pull-up �`{pcfg-pull-down �`|pcfg-pull-none �`ypcfg-pull-none-12ma � � `}suspendglobal-pwroff �yddrio-pwroff �yddr0-retention �{ddr1-retention �{edpedp-hpd � |i2c0i2c0-xfer �yy`Ei2c1i2c1-xfer �yy`&i2c2i2c2-xfer � y y`Ki2c3i2c3-xfer �yy`)i2c4i2c4-xfer �yy`*i2c5i2c5-xfer �yy`+i2s0i2s0-bus` �yyyyyy``lcdclcdc-ctl@ �yyyy`nsdmmcsdmmc-clk �}` sdmmc-cmd �~` sdmmc-cd �{`sdmmc-bus1 �{sdmmc-bus4@ �~~~~`sdmmc-pwr � ysdio0sdio0-bus1 �{sdio0-bus4@ �{{{{sdio0-cmd �{sdio0-clk �ysdio0-cd �{sdio0-wp �{sdio0-pwr �{sdio0-bkpwr �{sdio0-int �{sdio1sdio1-bus1 �{sdio1-bus4@ �{{{{sdio1-cd �{sdio1-wp �{sdio1-bkpwr �{sdio1-int �{sdio1-cmd �{sdio1-clk �ysdio1-pwr � {emmcemmc-clk �}`emmc-cmd �}`emmc-pwr � {`emmc-bus1 �{emmc-bus4@ �{{{{emmc-bus8� �}}}}}}}}`spi0spi0-clk � {`spi0-cs0 � {`spi0-tx �{`spi0-rx �{`spi0-cs1 �{spi1spi1-clk � {`spi1-cs0 � {`!spi1-rx �{` spi1-tx �{`spi2spi2-cs1 �{spi2-clk �{`"spi2-cs0 �{`%spi2-rx �{`$spi2-tx � {`#uart0uart0-xfer �{y`,uart0-cts �{`-uart0-rts �y`.uart1uart1-xfer �{ y`/uart1-cts � {uart1-rts � yuart2uart2-xfer �{y`0uart3uart3-xfer �{y`1uart3-cts � {uart3-rts � yuart4uart4-xfer �{y`2uart4-cts � {uart4-rts � ytsadcotp-pin � y`8otp-out � y`9pwm0pwm0-pin �y`Lpwm1pwm1-pin �y`Mpwm2pwm2-pin �y`Npwm3pwm3-pin �y`Ogmacrgmii-pins� �yyyy}}}}yyy }}yy`<rmii-pins� �yyyyyyyyyyphy-int �{`>phy-rst �`=spdifspdif-tx � y`_pcfg-output-high `ledsuser-led-pin �`�pmicpmic-int �{`Gpmic-sleep �{pcfg-pull-up-drv-12ma � � `~buttonsuser-button-pins �{{`�rv4162i2c-rtc-int � {`'touchscreents-irq-pin �yusb_hosthost0-vbus-drv � y`�host1-vbus-drv �y`�usb_otgotg-vbus-drv � y`�memory�memoryexternal-gmac-clock fixed-clock��sY@ �ext_gmac`;user-leds gpio-leds�default��led-0 Mgreen_led � Sheartbeat keepvdd-emmc-ioregulator-fixed �vdd_emmc_io�w@w@�`vdd-in-otg-outregulator-fixed�vdd_in_otg_out���LK@LK@`Ivdd-misc-1v8regulator-fixed �vdd_misc_1v8���w@w@`Juser-buttons gpio-keys�default��button-0Mhome "f �+button-1Mmenu "� �+usb-host0-regulatorregulator-fixed 5� �default�� �vcc_host0_5v�LK@LK@��Iusb-host1-regulatorregulator-fixed 5��default�� �vcc_host1_5v�LK@LK@��Iusb-otg-regulatorregulator-fixed 5� �default�� �vcc_otg_5v�LK@LK@��I #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2rtc0rtc1interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesspi-max-frequencym25p,fast-readpagesizelabellinux,default-triggerreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayti,rx-internal-delayti,tx-internal-delayti,fifo-depthenet-phy-lane-no-swapti,clk-output-selphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyboost-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorregulator-enable-ramp-delayregulator-ramp-delayvin-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplyflash0-supplyflash1-supplygpio1830-supplygpio30-supplybb-supplydvp-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highgpiosdefault-statelinux,code