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�pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshc �р 5�Drv�biuciuciu-driveciu-sample � �� @��&reset2okay9CUf�x�default� ��mmc@ff0d0000rockchip,rk3288-dw-mshc �р 5�Esw�biuciuciu-driveciu-sample �!�� @��&reset 2disabledmmc@ff0e0000rockchip,rk3288-dw-mshc �р 5�Ftx�biuciuciu-driveciu-sample �"��@��&reset 2disabledmmc@ff0f0000rockchip,rk3288-dw-mshc �р 5�Guy�biuciuciu-driveciu-sample �#��@��&reset2okay9C��default���saradc@ff100000rockchip,saradc�� �$�5I[�saradcapb_pclk�W &saradc-apb2okay�spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5AR�spiclkapb_pclk�  �txrx �,�default��� 2disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BS�spiclkapb_pclk� �txrx �-�default� !"�� 2disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CT�spiclkapb_pclk��txrx �.�default�#$%&�� 2disabledi2c@ff140000rockchip,rk3288-i2c�� �>�i2c5M�default�'2okayi2c@ff150000rockchip,rk3288-i2c�� �?�i2c5O�default�( 2disabledi2c@ff160000rockchip,rk3288-i2c�� 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�Pi�p��Caurtc@51haoyu,hym8563�Q��xin32kact8846@5aactive-semi,act8846�Z�default�D��CCCC'C3C?EregulatorsREG1Bvcc_ddr�REG2Bvcc_ioQ2Z�i2Z��aREG3Bvdd_logQ��i���REG4Bvcc_20Q��i���aEREG5 Bvccio_sdQ2Z�i2Z��aREG6 Bvdd10_lcdQB@iB@�REG7Bvcca_18Qw@iw@REG8Bvcca_33Q2Z�i2Z�aYREG9Bvcc_lanQ2Z�i2Z�a=REG10Bvdd_10QB@iB@�REG11Bvcc_18Qw@iw@�aREG12 Bvcc18_lcdQw@iw@�i2c@ff660000rockchip,rk3288-i2c��f �=�i2c5N�default�F2okaypwm@ff680000rockchip,rk3288-pwm��hK�default�G5_ 2disabledpwm@ff680010rockchip,rk3288-pwm��hK�default�H5_ 2disabledpwm@ff680020rockchip,rk3288-pwm��h K�default�I5_ 2disabledpwm@ff680030rockchip,rk3288-pwm��h0K�default�J5_ 2disabledsram@ff700000 mmio-sram��p���p�smp-sram@0rockchip,rk3066-smp-sram�sram@ff720000#rockchip,rk3288-pmu-srammmio-sram��rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd��sapower-controller!rockchip,rk3288-power-controllerV2hB a]power-domain@9� �5��������������chgfdehilkj$jKLMNOPQRSVpower-domain@11� 5�opjTUVpower-domain@12� 5��jVVpower-domain@13� 5�jWXVreboot-modesyscon-reboot-modeq�xRB��RB��RB� �RB�syscon@ff740000rockchip,rk3288-sgrfsyscon��tclock-controller@ff760000rockchip,rk3288-cru��v5 �xin24m�7��H2��j��k$�#g��ׄ�e��рxh���рxh�asyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd��wa7edp-phyrockchip,rk3288-dp-phy5h�24m� 2disabledamio-domains"rockchip,rk3288-io-voltage-domain2okay�Y��=".<usbphyrockchip,rk3288-usb-phy2okayusb-phy@320�� 5]�phyclk��� &phy-resetaAusb-phy@334��45^�phyclk��� &phy-reseta?usb-phy@348��H5_�phyclk��� &phy-reseta@watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt���5p �O2okaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif���H5T� �mclkhclk�Z�tx �6�default�[�7 2disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s���H �55R��i2s_clki2s_hclk�ZZ�txrx�default�\Yt 2disabledcrypto@ff8a0000rockchip,rk3288-crypto���@ �0 5��}��aclkhclksclkapb_pclk�� &crypto-rstiommu@ff900800rockchip,iommu���@ �5�� �aclkiface� 2disablediommu@ff914000rockchip,iommu ���@��P �5�� �aclkiface�� 2disabledrga@ff920000rockchip,rk3288-rga���� �5��j�aclkhclksclk�] �ilm &coreaxiahbvop@ff930000rockchip,rk3288-vop ������ �5����aclk_vopdclk_vophclk_vop�] �def &axiahbdclk�^2okayporta endpoint@0��_aqendpoint@1��`anendpoint@2��aahendpoint@3��bakiommu@ff930300rockchip,iommu��� �5�� �aclkiface�] �2okaya^vop@ff940000rockchip,rk3288-vop ������ �5����aclk_vopdclk_vophclk_vop�] ���� &axiahbdclk�c2okayporta endpoint@0��darendpoint@1��eaoendpoint@2��faiendpoint@3��galiommu@ff940300rockchip,iommu��� �5�� �aclkiface�] �2okayacmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi���@ �5~d �refpclk�] �7 2disabledportsportendpoint@0��haaendpoint@1��iaflvds@ff96c000rockchip,rk3288-lvds����@5g �pclk_lvds�lcdc�j�] �7 2disabledportsport@0�endpoint@0��kabendpoint@1��lagdp@ff970000rockchip,rk3288-dp���@ �b5ic�dppclk�m�dp�] �o&dp�7 2disabledportsport@0�endpoint@0��na`endpoint@1��oaehdmi@ff980000rockchip,rk3288-dw-hdmi����H�7 �g5hmn�iahbisfrcec�] 2okay�pportsportendpoint@0��qa_endpoint@1��radvideo-codec@ff9a0000rockchip,rk3288-vpu����   "vepuvdpu5�� �aclkhclk�s�] iommu@ff9a0800rockchip,iommu��� � 5�� �aclkiface��] asiommu@ff9c0440rockchip,iommu ���@@���@ �o5�� �aclkiface� 2disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760���$� "jobmmugpu5�t�] 2okay�ua4opp-table-1operating-points-v2atopp-100000000t��{~�opp-200000000t ��{~�opp-300000000t�{B@opp-400000000tׄ{��opp-600000000t#�F{�qos@ffaa0000rockchip,rk3288-qossyscon��� aWqos@ffaa0080rockchip,rk3288-qossyscon���� aXqos@ffad0000rockchip,rk3288-qossyscon��� aLqos@ffad0100rockchip,rk3288-qossyscon��� aMqos@ffad0180rockchip,rk3288-qossyscon���� aNqos@ffad0400rockchip,rk3288-qossyscon��� aOqos@ffad0480rockchip,rk3288-qossyscon���� aPqos@ffad0500rockchip,rk3288-qossyscon��� aKqos@ffad0800rockchip,rk3288-qossyscon��� aQqos@ffad0880rockchip,rk3288-qossyscon���� aRqos@ffad0900rockchip,rk3288-qossyscon��� aSqos@ffae0000rockchip,rk3288-qossyscon��� aVqos@ffaf0000rockchip,rk3288-qossyscon��� aTqos@ffaf0080rockchip,rk3288-qossyscon���� aUdma-controller@ffb20000arm,pl330arm,primecell���@�,5� �apb_pclkaZefuse@ffb40000rockchip,rk3288-efuse��� 5q �pclk_efusecpu-id@7�cpu_leakage@17�interrupt-controller@ffc01000 arm,gic-400�@����� ��@ ��`  � apinctrlrockchip,rk3288-pinctrl�7��gpio@ff750000rockchip,gpio-bank��u �Q5@)�a~gpio@ff780000rockchip,gpio-bank��x �R5A)�gpio@ff790000rockchip,gpio-bank��y �S5B)�gpio@ff7a0000rockchip,gpio-bank��z �T5C)�gpio@ff7b0000rockchip,gpio-bank��{ �U5D)�a>gpio@ff7c0000rockchip,gpio-bank��| �V5E)�gpio@ff7d0000rockchip,gpio-bank��} �W5F)�gpio@ff7e0000rockchip,gpio-bank��~ �X5G)�a}gpio@ff7f0000rockchip,gpio-bank�� �Y5H)�hdmihdmi-cec-c05vhdmi-cec-c75vhdmi-ddc 5vvhdmi-ddc-unwedge 5wvpcfg-output-lowCawpcfg-pull-upNaxpcfg-pull-down[aypcfg-pull-nonejavpcfg-pull-none-12majw azsuspendglobal-pwroff5vddrio-pwroff5vddr0-retention5xddr1-retention5xedpedp-hpd5 yi2c0i2c0-xfer 5vvaBi2c1i2c1-xfer 5vva'i2c2i2c2-xfer 5 v vaFi2c3i2c3-xfer 5vva(i2c4i2c4-xfer 5vva)i2c5i2c5-xfer 5vva*i2s0i2s0-bus`5vvvvvva\lcdclcdc-ctl@5vvvvajsdmmcsdmmc-clk5za sdmmc-cmd5{asdmmc-cd5xasdmmc-bus15xsdmmc-bus4@5{{{{asdmmc-pwr5 va�sdio0sdio0-bus15xsdio0-bus4@5xxxxsdio0-cmd5xsdio0-clk5vsdio0-cd5xsdio0-wp5xsdio0-pwr5xsdio0-bkpwr5xsdio0-int5xsdio1sdio1-bus15xsdio1-bus4@5xxxxsdio1-cd5xsdio1-wp5xsdio1-bkpwr5xsdio1-int5xsdio1-cmd5xsdio1-clk5vsdio1-pwr5 xemmcemmc-clk5vaemmc-cmd5xaemmc-pwr5 xaemmc-bus15xemmc-bus4@5xxxxemmc-bus8�5xxxxxxxxaspi0spi0-clk5 xaspi0-cs05 xaspi0-tx5xaspi0-rx5xaspi0-cs15xspi1spi1-clk5 xaspi1-cs05 xa"spi1-rx5xa!spi1-tx5xa spi2spi2-cs15xspi2-clk5xa#spi2-cs05xa&spi2-rx5xa%spi2-tx5 xa$uart0uart0-xfer 5xva+uart0-cts5xuart0-rts5vuart1uart1-xfer 5x va,uart1-cts5 xuart1-rts5 vuart2uart2-xfer 5xva-uart3uart3-xfer 5xva.uart3-cts5 xuart3-rts5 vuart4uart4-xfer 5xva/uart4-cts5 xuart4-rts5 vtsadcotp-pin5 va5otp-out5 va6pwm0pwm0-pin5vaGpwm1pwm1-pin5vaHpwm2pwm2-pin5vaIpwm3pwm3-pin5vaJgmacrgmii-pins�5vvvvzzzzvvv zzvva9rmii-pins�5vvvvvvvvvvphy-int5 xa<phy-pmeb5xa;phy-rst5|a:spdifspdif-tx5 va[pcfg-output-high�a|pcfg-pull-up-drv-12maNw a{act8846pmic-int5xpmic-sleep5wpmic-vsel5waDusb_hosthost-vbus-drv5vachosen�serial2:115200n8memory@0�memory��external-gmac-clock fixed-clock��sY@ �ext_gmaca8leds gpio-ledsled-0 �}�miqi:green:user�timerflash-regulatorregulator-fixed Bvcc_flashQw@iw@�ausb-host-regulatorregulator-fixed� �~�default� Bvcc_hostQLK@iLK@��Csdmmc-regulatorregulator-fixed �} �default��Bvcc_sdQ2Z�i2Z�����avsys-regulatorregulator-fixedBvcc_sysQLK@iLK@��aC #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathgpioslabellinux,default-triggerenable-active-highstartup-delay-us