� ��g�8_p(#_8 ,��8  ESSony Xperia Z3+/Z4Ysony,ivy-rowqcom,msm8994dhandsetaliasesq/soc@0/mmc@f9824900v/soc@0/mmc@f98a4900chosenclocksxo-board Yfixed-clock{�$� �xo_board�sleep-clk Yfixed-clock{�� �sleep_clk�cpus cpu@0�cpuYarm,cortex-a53��psci��l2-cacheYcache���cpu@1�cpuYarm,cortex-a53��psci��cpu@2�cpuYarm,cortex-a53��psci��cpu@3�cpuYarm,cortex-a53��psci��cpu@100�cpuYarm,cortex-a57��psci��l2-cacheYcache���cpu@101�cpuYarm,cortex-a57��psci�� cpu@102�cpuYarm,cortex-a57��psci�� cpu@103�cpuYarm,cortex-a57��psci�� cpu-mapcluster0core0�core1�core2�core3�cluster1core0�core1� core2� core3� firmwarescmYqcom,scm-msm8994qcom,scmmemory@80000000�memory��pmuYarm,cortex-a53-pmu remoteproc$Yqcom,msm8994-rpm-procqcom,rpm-procsmd-edge �  rpm-requestsYqcom,rpm-msm8994qcom,smd-rpm 0rpm_requestsclock-controllerYqcom,rpmcc-msm8994qcom,rpmcc{�Kpower-controllerYqcom,msm8994-rpmpdBV opp-tableYoperating-points-v2� opp1jopp2jopp3jopp4jopp5jopp6jregulators-0Yqcom,rpm-pmi8994-regulatorst�s1�������boost-bypass�0��6��regulators-1Yqcom,rpm-pm8994-regulators����� /AWm������s3�� �� �s4�w@�w@��(A�s5� �p� �p�s7�B@�B@l1�B@�B@l2����'(l3�B@�B@Ul4��(��(l6�w@�w@l8�w@�w@l9�w@�w@l10�w@�w@l11�O��O�l12�w@�w@'(l13�w@�-p�*l14�w@�w@'(Ul15�w@�w@l16�)2��)2�l17�)2��)2�Ul18�+|��+|�AUl20�-p�-p��(l21�-p�-p 5(�)l22�-���-��U�=l23�*���*��AUl24�.��0�l25�B@�B@Ul26�l�ll27�O��O�Ul28�B@�B@'(l29�)2��)2�Ul30�w@�w@Ul31�O��O�'(lvs1Ulvs2Ureserved-memory gdfps-data@3400000�@nmemory@3401000�@ nsmem@6a00000�� n�memory@7000000��nmemory@ca00000� ��nmemory@c6400000Yqcom,rmtfs-mem��@numemory@c6700000��pnmemory@c7000000���nmemory@c9400000��@�nreserved@6c00000��@nramoops@1fe00000Yramoops�� ����fb@40000000�@nmemory@c7800000�ǀ�nsmem Yqcom,smem���smp2p-lpass Yqcom,smp2p��� � � master-kernel�master-kernelslave-kernel �slave-kernel/smp2p-modem Yqcom,smp2p���  � master-kernel�master-kernelslave-kernel �slave-kernel/soc@0 g���� Ysimple-businterrupt-controller@f9000000Yqcom,msm-qgic2/��� �mailbox@f900d000%Yqcom,msm8994-apcs-kpss-globalsyscon��� @� watchdog@f9017000$Yqcom,apss-wdt-msm8994qcom,kpss-wdt��pLS timer@f9020000 gYarm,armv7-timer-mem��frame@f9021000_ ��� frame@f9023000_  ��0 ldisabledframe@f9024000_  ��@ ldisabledframe@f9025000_  ��P ldisabledframe@f9026000_  ��` ldisabledframe@f9027000_ ��p ldisabledframe@f9028000_ ��� ldisabledusb@f92f8800Yqcom,msm8994-dwc3qcom,dwc3��/� g Lrm�sscoreifacesleepmock_utmisr�$�'��usb@f9200000 Ysnps,dwc3�� � ��� high-speed peripheralmmc@f9824900%Yqcom,msm8994-sdhciqcom,sdhci-msm-v4���I���@hccore{� hc_irqpwr_irqLvhsifacecorexo0defaultsleep>H !R\ ldisabledmmc@f98a4900%Yqcom,msm8994-sdhciqcom,sdhci-msm-v4���I��@hccore}� hc_irqpwr_irqL�isifacecorexo0defaultsleep >"#$ H%&' j(dRlokays)*dma-controller@f9904000Yqcom,bam-v1.7.0���@� �L:sbam_clk������-serial@f991e000%Yqcom,msm-uartdm-v1.4qcom,msm-uartdm���� l scoreifaceLH:0defaultsleep>+H,lokayi2c@f9923000Yqcom,i2c-qup-v2.2.1���0 _L;: scoreiface���- - �txrx0defaultsleep>.H/  ldisabledspi@f9923000Yqcom,spi-qup-v2.2.1���0 _L<: scoreiface�- - �txrx0defaultsleep>0H1 lokayi2c@f9924000Yqcom,i2c-qup-v2.2.1���@ `L=: scoreiface�j��--�txrx0defaultsleep>2H3 lokayi2c@f9926000Yqcom,i2c-qup-v2.2.1���` bLA: scoreiface���--�txrx0defaultsleep>4H5  ldisabledi2c@f9927000Yqcom,i2c-qup-v2.2.1���p cLC: scoreiface���66�txrx0defaultsleep>7H8  ldisabledi2c@f9928000Yqcom,i2c-qup-v2.2.1���� dLE: scoreiface�j��--�txrx0defaultsleep>9H: lokayrmi4-i2c-dev@2cYsyna,rmi4-i2c�, (*0default>;<�=��� �rmi4-f01@1�!rmi4-f11@11�3dma-controller@f9944000Yqcom,bam-v1.7.0���@� �LMsbam_clk������6serial@f995e000%Yqcom,msm-uartdm-v1.4qcom,msm-uartdm���� r scoreifaceL[M�66�txrx0defaultsleep>>H?lokayi2c@f9963000Yqcom,i2c-qup-v2.2.1���0 eLNM scoreiface���6 6 �txrx0defaultsleep>@HA  ldisabledspi@f9966000Yqcom,spi-qup-v2.2.1���` hLUM scoreiface�66�txrx0defaultsleep>BHC  ldisabledi2c@f9967000Yqcom,i2c-qup-v2.2.1���p iLVM scoreiface�j��66�txrx0defaultsleep>DHE lokayclock-controller@fc400000Yqcom,gcc-msm8994{DB��@  sxosleepL�sram@fc428000Yqcom,rpm-msg-ram��B�@�restart@fc4ab000 Yqcom,pshold��J�spmi@fc4cf000Yqcom,spmi-pmic-arb��L��L��L�coreintrcnfg  periph_irq ��Q /pmic@0Yqcom,pm8994qcom,spmi-pmic� rtc@6000Yqcom,pm8941-rtc�`a rtcalarmapon@800Yqcom,pm8916-pon�^npwrkeyYqcom,pm8941-pwrkey|= ��tresinYqcom,pm8941-resin|= � ldisabledtemp-alarm@2400Yqcom,spmi-temp-alarm�$$�F�thermal��Madc@3100Yqcom,spmi-vadc�11 ��Fchannel@7���vph_pwrchannel@8� �die_tempchannel@9�  �ref_625mvchannel@a�  �ref_1250mvchannel@e�channel@f�gpio@c000 Yqcom,pm8994-gpioqcom,spmi-gpio��� G/�Gmpps@a000Yqcom,pm8994-mppqcom,spmi-mpp��� H/�Hpmic@1Yqcom,pm8994qcom,spmi-pmic� pwmYqcom,pm8994-lpg ! ldisabledregulatorsYqcom,pm8994-regulatorspmic@2Yqcom,pmi8994qcom,spmi-pmic� gpio@c000!Yqcom,pmi8994-gpioqcom,spmi-gpio��� I /�Impps@a000Yqcom,pmi8994-mppqcom,spmi-mpp��� J/�Jpmic@3Yqcom,pmi8994qcom,spmi-pmic� pwmYqcom,pmi8994-lpg ! ldisabledregulatorsYqcom,pmi8994-regulatorss2,VDD_GFX�� �� Awled@d800Yqcom,pmi8994-wled��� ��  ovpshort �backlight;E ldisabledhwlock@fd484000(Yqcom,msm8994-tcsr-mutexqcom,tcsr-mutex��H@X�pinctrl@fd510000Yqcom,msm8994-pinctrl��Q@ �� (�/�(blsp1-uart2-default-state fgpio4gpio5 kblsp_uart2t��+blsp1-uart2-sleep-state fgpio4gpio5kgpiot��,blsp2-uart2-default-statefgpio45gpio46gpio47gpio48 kblsp_uart8t��>blsp2-uart2-sleep-statefgpio45gpio46gpio47gpio48kgpiot��?i2c1-default-state fgpio2gpio3 kblsp_i2c1t��.i2c1-sleep-state fgpio2gpio3kgpiot��/i2c2-default-state fgpio6gpio7 kblsp_i2c2t��2i2c2-sleep-state fgpio6gpio7kgpiot��3i2c4-default-statefgpio19gpio20 kblsp_i2c4t��4i2c4-sleep-statefgpio19gpio20kgpiot��5i2c5-default-statefgpio23gpio24 kblsp_i2c5t��7i2c5-sleep-statefgpio23gpio24kgpiot��8i2c6-default-statefgpio28gpio27 kblsp_i2c6t��9i2c6-sleep-statefgpio28gpio27kgpiot��:i2c7-default-statefgpio44gpio43 kblsp_i2c7t��@i2c7-sleep-statefgpio44gpio43kgpiot��Ablsp2-spi10-default-state�Bdefault-pinsfgpio53gpio54gpio55 kblsp_spi10t �cs-pinsfgpio67kgpiot�blsp2-spi10-sleep-statefgpio53gpio54gpio55kgpiot��Ci2c11-default-statefgpio83gpio84 kblsp_i2c11t��Di2c11-sleep-statefgpio83gpio84kgpiot��Eblsp1-spi1-default-state�0default-pinsfgpio0gpio1gpio3 kblsp_spi1t �cs-pinsfgpio8kgpiot�blsp1-spi1-sleep-statefgpio0gpio1gpio3kgpiot��1clk-on-state fsdc1_clk�t�clk-off-state fsdc1_clk�t�cmd-on-state fsdc1_cmd�t�cmd-off-state fsdc1_cmd�t�data-on-state fsdc1_data�t�data-off-state fsdc1_data�t� rclk-on-state fsdc1_rclk��rclk-off-state fsdc1_rclk��!sdc2-clk-on-state fsdc2_clk�t �"sdc2-clk-off-state fsdc2_clk�t�%sdc2-cmd-on-state fsdc2_cmd�t �#sdc2-cmd-off-state fsdc2_cmd�t�&sdc2-data-on-state fsdc2_data�t �$sdc2-data-off-state fsdc2_data�t�'ts-int-active-statefgpio42kgpiot��;ts-reset-active-statefgpio109kgpiot���<clock-controller@fd8c0000Yqcom,mmcc-msm8994���R{DBYsxogpll0mmssnoc_ahboxili_gfx3d_clk_srcdsi0plldsi0pllbytedsi1plldsi1pllbytehdmipll0L�KK (LLLLL �/�E��<��98p#�F�Lsram@fdd00000Yqcom,msm8974-ocmem��� ��  ctrlmem g�� LK"Lr scoreiface gmu-sram@0�timerYarm,armv8-timer0����vph-pwr-regulatorYregulator-fixed,vph_pwr�6��6�A�thermal-zonespm8994-thermal���Mtripspm8994-alert0�s��lpassivepm8994-crit��H�� lcriticalgpio-keys Ygpio-keys�button-0 �Volume Down mG��rbutton-1 �Volume Up mG��sbutton-2�Camera Snapshot mG���button-3 �Camera Focus mG��s interrupt-parent#address-cells#size-cellsqcom,msm-idqcom,pmic-idqcom,board-idmodelcompatiblechassis-typemmc1mmc2#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregenable-methodnext-level-cachecache-levelcache-unifiedcpuinterruptsmboxesqcom,smd-edgeqcom,remote-pidqcom,smd-channels#power-domain-cellsoperating-points-v2opp-levelvdd_s1-supplyvdd_bst_byp-supplyregulator-min-microvoltregulator-max-microvoltvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s6-supplyvdd_s7-supplyvdd_l1-supplyvdd_l2_l26_l28-supplyvdd_l3_l11-supplyvdd_l4_l27_l31-supplyvdd_l6_l12_l32-supplyvdd_l8_l16_l30-supplyvdd_l9_l10_l18_l22-supplyvdd_l13_l19_l23_l24-supplyvdd_l14_l15-supplyvdd_l17_l29-supplyvdd_l20_l21-supplyvdd_l25-supplyvdd_lvs1_2-supplyregulator-system-loadregulator-allow-set-loadregulator-always-onregulator-boot-onrangesno-mapqcom,client-idconsole-sizerecord-sizeftrace-sizepmsg-sizememory-regionqcom,rpm-msg-ramhwlocksqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#mbox-cellsclockstimeout-secframe-numberstatusclock-namesassigned-clocksassigned-clock-ratespower-domainsqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkmaximum-speeddr_modereg-namesinterrupt-namespinctrl-namespinctrl-0pinctrl-1bus-widthnon-removablecd-gpiosvmmc-supplyvqmmc-supply#dma-cellsqcom,eeqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-namesvdd-supplyvio-supplysyna,reset-delay-mssyna,startup-delay-mssyna,nosleep-modesyna,sensor-type#reset-cellsqcom,channelmode-bootloadermode-recoverydebouncebias-pull-uplinux,codeio-channelsio-channel-names#thermal-sensor-cells#io-channel-cellsqcom,pre-scalinglabelgpio-controllergpio-ranges#gpio-cells#pwm-cellsregulator-nameqcom,cabcqcom,external-pfet#hwlock-cellspinsfunctiondrive-strengthbias-disablebias-pull-downoutput-lowpolling-delay-passivethermal-sensorstemperaturehysteresisautorepeatlinux,input-typewakeup-sourcedebounce-interval