� ���8( ��3logicpd,dm3730-torpedo-devkitti,omap3630ti,omap3 +77LogicPD Zoom DM3730 Torpedo + Wireless Development Kitchosen=/ocp@68000000/serial@4806a000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000 �/displaycpus+cpu@0arm,cortex-a8�cpu���cpu��������!pmu@54000000arm,cortex-a8-pmu�T�debugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus�h +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus� +  pinmux@30 ti,omap3-padconfpinctrl-single�08+.?Tr���pinmux_mcbsp2_pins � �pinmux_uart2_pins(�DFHJh��pinmux_mcspi1_pins �������pinmux_hsusb_otg_pins`�rtvxz|~������pinmux_i2c1_pins�����pinmux_i2c2_pins�����pinmux_i2c3_pins�����pinmux_twl4030_pins��A��pinmux_gpio_key_pins����$hdq_pins����pinmux_pwm_pins���(pinmux_led_pins����"pinmux_mmc1_pins0���pinmux_tsc2004_pins�V��pinmux_backlight_pins�X�-pinmux_isp_pins`��������������pinmux_panel_pwr_pins�Z�*pinmux_dss_dpi_pins1������������������� � � � � � �pinmux_mm3_pins0�468:T^�scm_conf@270sysconsimple-bus�p0+ p0�pbias_regulator@2b0ti,pbias-omap3ti,pbias-omap���pbias_mmc_omap2430�pbias_mmc_omap2430�w@�-����clocks+mcbsp5_mux_fck@68�ti,composite-mux-clock���h� mcbsp5_fck�ti,composite-clock� � mcbsp1_mux_fck@4�ti,composite-mux-clock���� mcbsp1_fck�ti,composite-clock� �mcbsp2_mux_fck@4�ti,composite-mux-clock� ���mcbsp2_fck�ti,composite-clock��mcbsp3_mux_fck@68�ti,composite-mux-clock� �h�mcbsp3_fck�ti,composite-clock��mcbsp4_mux_fck@68�ti,composite-mux-clock� ��h�mcbsp4_fck�ti,composite-clock�� clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single� \+.?Tr�pinmux_twl4030_vpins ���pinmux_gpio_key_pins_wkup� �%pinmux_lan9221_pins�Z�pinmux_mmc1_cd�T��target-module@480a6000ti,sysc-omap2ti,sysc�H `DH `HH `Lrevsyscsyss  (��ick+ H ` aes1@0 ti,omap3-aes�P5  :txrxtarget-module@480c5000ti,sysc-omap2ti,sysc�H PDH PHH PLrevsyscsyss  (��ick+ H P aes2@0 ti,omap3-aes�P5AB:txrxprm@48306000 ti,omap3-prm�H0`@ clocks+virt_16_8m_ck� fixed-clockDY�osc_sys_ck@d40� ti,mux-clock�� @�sys_ck@1270�ti,divider-clock��T�p_�"sys_clkout1@d70�ti,gate-clock�� p�dpll3_x2_ck�fixed-factor-clock�v�dpll3_m2x2_ck�fixed-factor-clock�v��!dpll4_x2_ck�fixed-factor-clock� v�corex2_fck�fixed-factor-clock�!v��#wkup_l4_ick�fixed-factor-clock�"v��Rcorex2_d3_fck�fixed-factor-clock�#v���corex2_d5_fck�fixed-factor-clock�#v���clockdomainscm@48004000 ti,omap3-cm�H@@clocks+dummy_apb_pclk� fixed-clockDomap_32k_fck� fixed-clockD��Dvirt_12m_ck� fixed-clockD��virt_13m_ck� fixed-clockD�]@�virt_19200000_ck� fixed-clockD$��virt_26000000_ck� fixed-clockD����virt_38_4m_ck� fixed-clockDI��dpll4_ck@d00�ti,omap3-dpll-per-j-type-clock�""� D 0� dpll4_m2_ck@d48�ti,divider-clock� T?� H_�$dpll4_m2x2_mul_ck�fixed-factor-clock�$v��%dpll4_m2x2_ck@d00�ti,hsdiv-gate-clock�%�� ��&omap_96m_alwon_fck�fixed-factor-clock�&v��-dpll3_ck@d00�ti,omap3-dpll-core-clock�""� @ 0�dpll3_m3_ck@1140�ti,divider-clock��T�@_�'dpll3_m3x2_mul_ck�fixed-factor-clock�'v��(dpll3_m3x2_ck@d00�ti,hsdiv-gate-clock�(� � ��)emu_core_alwon_ck�fixed-factor-clock�)v��fsys_altclk� fixed-clockD�2mcbsp_clks� fixed-clockD�dpll3_m2_ck@d40�ti,divider-clock��T� @_�core_ck�fixed-factor-clock�v��*dpll1_fck@940�ti,divider-clock�*�T� @_�+dpll1_ck@904�ti,omap3-dpll-clock�"+�  $ @ 4�dpll1_x2_ck�fixed-factor-clock�v��,dpll1_x2m2_ck@944�ti,divider-clock�,T� D_�@cm_96m_fck�fixed-factor-clock�-v��.omap_96m_fck@d40� ti,mux-clock�."�� @�Idpll4_m3_ck@e40�ti,divider-clock� �T �@_�/dpll4_m3x2_mul_ck�fixed-factor-clock�/v��0dpll4_m3x2_ck@d00�ti,hsdiv-gate-clock�0�� ��1omap_54m_fck@d40� ti,mux-clock�12�� @�<cm_96m_d2_fck�fixed-factor-clock�.v��3omap_48m_fck@d40� ti,mux-clock�32�� @�4omap_12m_fck�fixed-factor-clock�4v��Kdpll4_m4_ck@e40�ti,divider-clock� T�@_�5dpll4_m4x2_mul_ck�ti,fixed-factor-clock�5����6dpll4_m4x2_ck@d00�ti,gate-clock�6�� ����dpll4_m5_ck@f40�ti,divider-clock� T?�@_�7dpll4_m5x2_mul_ck�ti,fixed-factor-clock�7����8dpll4_m5x2_ck@d00�ti,hsdiv-gate-clock�8�� ���ndpll4_m6_ck@1140�ti,divider-clock� �T?�@_�9dpll4_m6x2_mul_ck�fixed-factor-clock�9v��:dpll4_m6x2_ck@d00�ti,hsdiv-gate-clock�:�� ��;emu_per_alwon_ck�fixed-factor-clock�;v��gclkout2_src_gate_ck@d70� ti,composite-no-wait-gate-clock�*�� p�=clkout2_src_mux_ck@d70�ti,composite-mux-clock�*".<� p�>clkout2_src_ck�ti,composite-clock�=>�?sys_clkout2@d70�ti,divider-clock�?�T@� p�mpu_ck�fixed-factor-clock�@v��Aarm_fck@924�ti,divider-clock�A� $Temu_mpu_alwon_ck�fixed-factor-clock�Av��hl3_ick@a40�ti,divider-clock�*T� @_�Bl4_ick@a40�ti,divider-clock�B�T� @_�Crm_ick@c40�ti,divider-clock�C�T� @_gpt10_gate_fck@a00�ti,composite-gate-clock�"� � �Egpt10_mux_fck@a40�ti,composite-mux-clock�D"�� @�Fgpt10_fck�ti,composite-clock�EFgpt11_gate_fck@a00�ti,composite-gate-clock�"� � �Ggpt11_mux_fck@a40�ti,composite-mux-clock�D"�� @�Hgpt11_fck�ti,composite-clock�GHcore_96m_fck�fixed-factor-clock�Iv��mmchs2_fck@a00�ti,wait-gate-clock�� ���mmchs1_fck@a00�ti,wait-gate-clock�� ���i2c3_fck@a00�ti,wait-gate-clock�� ���i2c2_fck@a00�ti,wait-gate-clock�� ���i2c1_fck@a00�ti,wait-gate-clock�� ���mcbsp5_gate_fck@a00�ti,composite-gate-clock�� � � mcbsp1_gate_fck@a00�ti,composite-gate-clock�� � � core_48m_fck�fixed-factor-clock�4v��Jmcspi4_fck@a00�ti,wait-gate-clock�J� ���mcspi3_fck@a00�ti,wait-gate-clock�J� ���mcspi2_fck@a00�ti,wait-gate-clock�J� ���mcspi1_fck@a00�ti,wait-gate-clock�J� ���uart2_fck@a00�ti,wait-gate-clock�J� ���uart1_fck@a00�ti,wait-gate-clock�J� � ��core_12m_fck�fixed-factor-clock�Kv��Lhdq_fck@a00�ti,wait-gate-clock�L� ���core_l3_ick�fixed-factor-clock�Bv��Msdrc_ick@a10�ti,wait-gate-clock�M� ���gpmc_fck�fixed-factor-clock�Mv�core_l4_ick�fixed-factor-clock�Cv��Nmmchs2_ick@a10�ti,omap3-interface-clock�N� ���mmchs1_ick@a10�ti,omap3-interface-clock�N� ���hdq_ick@a10�ti,omap3-interface-clock�N� ���mcspi4_ick@a10�ti,omap3-interface-clock�N� ���mcspi3_ick@a10�ti,omap3-interface-clock�N� ���mcspi2_ick@a10�ti,omap3-interface-clock�N� ���mcspi1_ick@a10�ti,omap3-interface-clock�N� ���i2c3_ick@a10�ti,omap3-interface-clock�N� ���i2c2_ick@a10�ti,omap3-interface-clock�N� ���i2c1_ick@a10�ti,omap3-interface-clock�N� ���uart2_ick@a10�ti,omap3-interface-clock�N� ���uart1_ick@a10�ti,omap3-interface-clock�N� � ��gpt11_ick@a10�ti,omap3-interface-clock�N� � ��gpt10_ick@a10�ti,omap3-interface-clock�N� � ��mcbsp5_ick@a10�ti,omap3-interface-clock�N� � ��mcbsp1_ick@a10�ti,omap3-interface-clock�N� � ��omapctrl_ick@a10�ti,omap3-interface-clock�N� ���dss_tv_fck@e00�ti,gate-clock�<����dss_96m_fck@e00�ti,gate-clock�I����dss2_alwon_fck@e00�ti,gate-clock�"����dummy_ck� fixed-clockDgpt1_gate_fck@c00�ti,composite-gate-clock�"�� �Ogpt1_mux_fck@c40�ti,composite-mux-clock�D"� @�Pgpt1_fck�ti,composite-clock�OP� aes2_ick@a10�ti,omap3-interface-clock�N�� �wkup_32k_fck�fixed-factor-clock�Dv��Qgpio1_dbck@c00�ti,gate-clock�Q� ���sha12_ick@a10�ti,omap3-interface-clock�N� ���wdt2_fck@c00�ti,wait-gate-clock�Q� ���wdt2_ick@c10�ti,omap3-interface-clock�R� ���wdt1_ick@c10�ti,omap3-interface-clock�R� ���gpio1_ick@c10�ti,omap3-interface-clock�R� ���omap_32ksync_ick@c10�ti,omap3-interface-clock�R� ���gpt12_ick@c10�ti,omap3-interface-clock�R� ���gpt1_ick@c10�ti,omap3-interface-clock�R� ���per_96m_fck�fixed-factor-clock�-v�� per_48m_fck�fixed-factor-clock�4v��Suart3_fck@1000�ti,wait-gate-clock�S�� ��gpt2_gate_fck@1000�ti,composite-gate-clock�"���Tgpt2_mux_fck@1040�ti,composite-mux-clock�D"�@�Ugpt2_fck�ti,composite-clock�TU� gpt3_gate_fck@1000�ti,composite-gate-clock�"���Vgpt3_mux_fck@1040�ti,composite-mux-clock�D"��@�Wgpt3_fck�ti,composite-clock�VWgpt4_gate_fck@1000�ti,composite-gate-clock�"���Xgpt4_mux_fck@1040�ti,composite-mux-clock�D"��@�Ygpt4_fck�ti,composite-clock�XYgpt5_gate_fck@1000�ti,composite-gate-clock�"���Zgpt5_mux_fck@1040�ti,composite-mux-clock�D"��@�[gpt5_fck�ti,composite-clock�Z[gpt6_gate_fck@1000�ti,composite-gate-clock�"���\gpt6_mux_fck@1040�ti,composite-mux-clock�D"��@�]gpt6_fck�ti,composite-clock�\]gpt7_gate_fck@1000�ti,composite-gate-clock�"���^gpt7_mux_fck@1040�ti,composite-mux-clock�D"��@�_gpt7_fck�ti,composite-clock�^_gpt8_gate_fck@1000�ti,composite-gate-clock�"� ��`gpt8_mux_fck@1040�ti,composite-mux-clock�D"��@�agpt8_fck�ti,composite-clock�`agpt9_gate_fck@1000�ti,composite-gate-clock�"� ��bgpt9_mux_fck@1040�ti,composite-mux-clock�D"��@�cgpt9_fck�ti,composite-clock�bcper_32k_alwon_fck�fixed-factor-clock�Dv��dgpio6_dbck@1000�ti,gate-clock�d����gpio5_dbck@1000�ti,gate-clock�d����gpio4_dbck@1000�ti,gate-clock�d����gpio3_dbck@1000�ti,gate-clock�d����gpio2_dbck@1000�ti,gate-clock�d�� ��wdt3_fck@1000�ti,wait-gate-clock�d�� ��per_l4_ick�fixed-factor-clock�Cv��egpio6_ick@1010�ti,omap3-interface-clock�e����gpio5_ick@1010�ti,omap3-interface-clock�e����gpio4_ick@1010�ti,omap3-interface-clock�e����gpio3_ick@1010�ti,omap3-interface-clock�e����gpio2_ick@1010�ti,omap3-interface-clock�e�� ��wdt3_ick@1010�ti,omap3-interface-clock�e�� ��uart3_ick@1010�ti,omap3-interface-clock�e�� ��uart4_ick@1010�ti,omap3-interface-clock�e����gpt9_ick@1010�ti,omap3-interface-clock�e�� ��gpt8_ick@1010�ti,omap3-interface-clock�e�� ��gpt7_ick@1010�ti,omap3-interface-clock�e����gpt6_ick@1010�ti,omap3-interface-clock�e����gpt5_ick@1010�ti,omap3-interface-clock�e����gpt4_ick@1010�ti,omap3-interface-clock�e����gpt3_ick@1010�ti,omap3-interface-clock�e����gpt2_ick@1010�ti,omap3-interface-clock�e����mcbsp2_ick@1010�ti,omap3-interface-clock�e����mcbsp3_ick@1010�ti,omap3-interface-clock�e����mcbsp4_ick@1010�ti,omap3-interface-clock�e����mcbsp2_gate_fck@1000�ti,composite-gate-clock����mcbsp3_gate_fck@1000�ti,composite-gate-clock����mcbsp4_gate_fck@1000�ti,composite-gate-clock����emu_src_mux_ck@1140� ti,mux-clock�"fgh�@�iemu_src_ck�ti,clkdm-gate-clock�i�jpclk_fck@1140�ti,divider-clock�j�T�@_pclkx2_fck@1140�ti,divider-clock�j�T�@_atclk_fck@1140�ti,divider-clock�j�T�@_traceclk_src_fck@1140� ti,mux-clock�"fgh��@�ktraceclk_fck@1140�ti,divider-clock�k� T�@_secure_32k_fck� fixed-clockD��lgpt12_fck�fixed-factor-clock�lv�� wdt1_fck�fixed-factor-clock�lv�security_l4_ick2�fixed-factor-clock�Cv��maes1_ick@a14�ti,omap3-interface-clock�m�� �rng_ick@a14�ti,omap3-interface-clock�m� ��sha11_ick@a14�ti,omap3-interface-clock�m� �des1_ick@a14�ti,omap3-interface-clock�m� �cam_mclk@f00�ti,gate-clock�n���cam_ick@f10�!ti,omap3-no-wait-interface-clock�C����csi2_96m_fck@f00�ti,gate-clock�����security_l3_ick�fixed-factor-clock�Bv��opka_ick@a14�ti,omap3-interface-clock�o� �icr_ick@a10�ti,omap3-interface-clock�N� �des2_ick@a10�ti,omap3-interface-clock�N� �mspro_ick@a10�ti,omap3-interface-clock�N� �mailboxes_ick@a10�ti,omap3-interface-clock�N� �ssi_l4_ick�fixed-factor-clock�Cv��vsr1_fck@c00�ti,wait-gate-clock�"� ��sr2_fck@c00�ti,wait-gate-clock�"� ��sr_l4_ick�fixed-factor-clock�Cv�dpll2_fck@40�ti,divider-clock�*�T�@_�pdpll2_ck@4�ti,omap3-dpll-clock�"p�$@4����qdpll2_m2_ck@44�ti,divider-clock�qT�D_�riva2_ck@0�ti,wait-gate-clock�r����modem_fck@a00�ti,omap3-interface-clock�"� ���sad2d_ick@a10�ti,omap3-interface-clock�B� ���mad2d_ick@a18�ti,omap3-interface-clock�B� ���mspro_fck@a00�ti,wait-gate-clock�� �ssi_ssr_gate_fck_3430es2@a00� ti,composite-no-wait-gate-clock�#�� �sssi_ssr_div_fck_3430es2@a40�ti,composite-divider-clock�#�� @$�tssi_ssr_fck_3430es2�ti,composite-clock�st�ussi_sst_fck_3430es2�fixed-factor-clock�uv��hsotgusb_ick_3430es2@a10�"ti,omap3-hsotgusb-interface-clock�M� ���ssi_ick_3430es2@a10�ti,omap3-ssi-interface-clock�v� ��usim_gate_fck@c00�ti,composite-gate-clock�I� � ��sys_d2_ck�fixed-factor-clock�"v��xomap_96m_d2_fck�fixed-factor-clock�Iv��yomap_96m_d4_fck�fixed-factor-clock�Iv��zomap_96m_d8_fck�fixed-factor-clock�Iv��{omap_96m_d10_fck�fixed-factor-clock�Iv� �|dpll5_m2_d4_ck�fixed-factor-clock�wv��}dpll5_m2_d8_ck�fixed-factor-clock�wv��~dpll5_m2_d16_ck�fixed-factor-clock�wv��dpll5_m2_d20_ck�fixed-factor-clock�wv���usim_mux_fck@c40�ti,composite-mux-clock(�"xyz{|}~��� @_��usim_fck�ti,composite-clock���usim_ick@c10�ti,omap3-interface-clock�R� � ��dpll5_ck@d04�ti,omap3-dpll-clock�""�  $ L 4����dpll5_m2_ck@d50�ti,divider-clock��T� P_�wsgx_gate_fck@b00�ti,composite-gate-clock�*�� ��core_d3_ck�fixed-factor-clock�*v���core_d4_ck�fixed-factor-clock�*v���core_d6_ck�fixed-factor-clock�*v���omap_192m_alwon_fck�fixed-factor-clock�&v���core_d2_ck�fixed-factor-clock�*v���sgx_mux_fck@b40�ti,composite-mux-clock ����.����� @��sgx_fck�ti,composite-clock����sgx_ick@b10�ti,wait-gate-clock�B� ���cpefuse_fck@a08�ti,gate-clock�"� ���ts_fck@a08�ti,gate-clock�D� ���usbtll_fck@a08�ti,wait-gate-clock�w� ���usbtll_ick@a18�ti,omap3-interface-clock�N� ���mmchs3_ick@a10�ti,omap3-interface-clock�N� ���mmchs3_fck@a00�ti,wait-gate-clock�� ���dss1_alwon_fck_3430es2@e00�ti,dss-gate-clock�������dss_ick_3430es2@e10�ti,omap3-dss-interface-clock�C����usbhost_120m_fck@1400�ti,gate-clock�w����usbhost_48m_fck@1400�ti,dss-gate-clock�4����usbhost_ick@1410�ti,omap3-dss-interface-clock�C����uart4_fck@1000�ti,wait-gate-clock�S����clockdomainscore_l3_clkdmti,clockdomain���dpll3_clkdmti,clockdomain�dpll1_clkdmti,clockdomain�per_clkdmti,clockdomainl����������������������������emu_clkdmti,clockdomain�jdpll4_clkdmti,clockdomain� wkup_clkdmti,clockdomain$����������dss_clkdmti,clockdomain������core_l4_clkdmti,clockdomain��������������������������������������cam_clkdmti,clockdomain���iva2_clkdmti,clockdomain��dpll2_clkdmti,clockdomain�qd2d_clkdmti,clockdomain ����dpll5_clkdmti,clockdomain��sgx_clkdmti,clockdomain��usbhost_clkdmti,clockdomain ����target-module@48320000ti,sysc-omap2ti,sysc�H2H2 revsysc�Q��fckick+ H2counter@0ti,omap-counter32k� interrupt-controller@48200000ti,omap3-intc?.�H �target-module@48056000ti,sysc-omap2ti,sysc�H`H`,H`(revsyscsyss #  (�M�ick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma� -8 E`�gpio@48310000ti,omap3-gpio�H1gpio1Rdt?.�&gpio@49050000ti,omap3-gpio�Igpio2dt?.gpio@49052000ti,omap3-gpio�I gpio3dt?.gpio@49054000ti,omap3-gpio�I@ gpio4dt?.��gpio@49056000ti,omap3-gpio�I`!gpio5dt?.��gpio@49058000ti,omap3-gpio�I�"gpio6dt?.��serial@4806a000ti,omap3-uart�H� �H�R512:txrxuart1D�lserial@4806c000ti,omap3-uart�H��I�J534uart2D�l�default��bluetooth ti,wl1283-st ���-��serial@49020000ti,omap3-uart�I�J556:txrxuart3D�li2c@48070000 ti,omap3-i2c�H�85:txrx+i2c1�default��D'�@twl@48�H ���fck ti,twl4030?.�default���audioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci ���� �vac�0���watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1�-���-����regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4�w@�w@��regulator-vdd1ti,twl4030-vdd1� '�� �regulator-vdacti,twl4030-vdac�w@�w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1�:��0��regulator-vmmc2ti,twl4030-vmmc2�:��0��/regulator-vusb1v5ti,twl4030-vusb1v5��regulator-vusb1v8ti,twl4030-vusb1v8��regulator-vusb3v1ti,twl4030-vusb3v1��regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2�w@�w@�regulator-vsimti,twl4030-vsim�w@�-��gpioti,twl4030-gpiodt?.�#twl4030-usbti,twl4030-usb %�3�A�OX�pwmti,twl4030-pwmcpwmledti,twl4030-pwmledcpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadn~ �disabledmadcti,twl4030-madc���power4ti,twl4030-power-idle-osc-offti,twl4030-power-idle�i2c@48072000 ti,omap3-i2c�H �95:txrx+i2c2�default��D�mt9p031@48aptina,mt9p031�H��������portendpoint�n6�]J� ��i2c@48060000 ti,omap3-i2c�H�=5:txrx+i2c3�default��D�at24@50 atmel,24c64�Ptsc2004@48 ti,tsc2004�H#��default�� ��.ATn����@mailbox@48094000ti,omap3-mailboxmailbox�H @���dsp  spi@48098000ti,omap2-mcspi�H �A+mcspi1@5#$%&'()* :tx0rx0tx1rx1tx2rx2tx3rx3�default��at25@0 atmel,at25�,LK@>GP@T�Yspi@4809a000ti,omap2-mcspi�H �B+mcspi2 5+,-.:tx0rx0tx1rx1spi@480b8000ti,omap2-mcspi�H �[+mcspi3 5:tx0rx0tx1rx1spi@480ba000ti,omap2-mcspi�H �0+mcspi45FG:tx0rx01w@480b2000 ti,omap3-1w�H :hdq1w�default��mmc@4809c000ti,omap3-hsmmc�H �Smmc1g5=>:txrxt��S��default��� �����mmc@480b4000ti,omap3-hsmmc�H @Vmmc25/0:txrxmmc@480ad000ti,omap3-hsmmc�H �^mmc35MN:txrx�^�6��default����+wlcore@2 ti,wl1283� ���������mmu@480bd400�ti,omap2-iommu�H ��mmu_isp��mmu@5d000000�ti,omap2-iommu�]�mmu_iva �disabledwdt@48314000 ti,omap3-wdt�H1@� wd_timer2mcbsp@48074000ti,omap3-mcbsp�H@�mpu ;< commontxrx�mcbsp15 :txrx��fck �disabledtarget-module@480a0000ti,sysc-omap2ti,sysc�H <H @H Drevsyscsyss (��ick+ H rng@0 ti,omap2-rng� 4mcbsp@49022000ti,omap3-mcbsp�I �I�� mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone5!":txrx���fckick�okay�default��'mcbsp@49024000ti,omap3-mcbsp�I@�I�� mpusidetoneYZcommontxrxsidetone�mcbsp3mcbsp3_sidetone5:txrx���fckick �disabledmcbsp@49026000ti,omap3-mcbsp�I`�mpu 67 commontxrx�mcbsp45:txrx� �fck& �disabledmcbsp@48096000ti,omap3-mcbsp�H `�mpu QR commontxrx�mcbsp55:txrx� �fck �disabledsham@480c3000ti,omap3-shamsham�H 0d15E:rxtarget-module@48318000ti,sysc-omap2-timerti,sysc�H1�H1�H1�revsyscsyss ' (� ��fckick+ H1�7Ktimer@0ti,omap3430-timer��� �fck%Ve uDtarget-module@49032000ti,sysc-omap2-timerti,sysc�I I I revsyscsyss ' (� ��fckick+ I timer@0ti,omap3430-timer�&timer@49034000ti,omap3430-timer�I@'timer3timer@49036000ti,omap3430-timer�I`(timer4timer@49038000ti,omap3430-timer�I�)timer5�timer@4903a000ti,omap3430-timer�I�*timer6�timer@4903c000ti,omap3430-timer�I�+timer7�timer@4903e000ti,omap3430-timer�I�,timer8��timer@49040000ti,omap3430-timer�I-timer9�timer@48086000ti,omap3430-timer�H`.timer10��)timer@48088000ti,omap3430-timer�H�/timer11�target-module@48304000ti,sysc-omap2-timerti,sysc�H0@H0@H0@revsyscsyss ' (� ��fckick+ H0@timer@0ti,omap3430-timer�_V�usbhstll@48062000 ti,usbhs-tll�H N usb_tll_hsusbhshost@48064000ti,usbhs-host�H@ usb_host_hs+ �disabledohci@48064400ti,ohci-omap3�HDL�ehci@48064800 ti,ehci-omap�HHMgpmc@6e000000ti,omap3430-gpmcgpmc�n�5:rxtx��+?.dt 0,�nand@0,0ti,omap2-nand � �micron,mt29f4g16abbda3w� bch8 #4B,T,fu"�,�(�6�@�R�R�(� +ethernet@gpmcsmsc,lan9221smsc,lan9115 & 14B*T$fu �  C�* Q�$�<�6�$ _ y ���* � � � � � �default� � ��usb_otg_hs@480ab000ti,omap3-musb�H �\]mcdma usb_otg_hs  * 2 �default� ; J R Wusb2-phyS a2dss@48050000 ti,omap3-dss�H�okay dss_core���fck+ g w�default�dispc@48050400ti,omap3-dispc�H dss_dispc���fckencoder@4804fc00 ti,omap3-dsi�H�H�@H� protophypll �disabled dss_dsi1��� �fcksys_clk+encoder@48050800ti,omap3-rfbi�H �disabled dss_rfbi����fckickencoder@48050c00ti,omap3-venc�H  �disabled dss_venc����fcktv_dac_clkportendpoint  ��,ssi-controller@48058000 ti,omap3-ssissi�okay�H�H�sysgddGgdd_mpu+ �u �ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-port�H�H�txrxCDssi-port@4805b000ti,omap3-ssi-port�H�H�txrxEFserial@49042000ti,omap3-uart�I P5QR:txrxuart4D�lregulator-abb-mpu ti,abb-v1 �abb_mpu_iva+�H0r�H0hbase-addressint-address ��" � �` �sO�7���pinmux@480025a0 ti,omap3-padconfpinctrl-single�H%�\+.?Tr�pinmux_mmc3_core2_pins�8:�isp@480bc000 ti,omap3-isp�H ��H � ��� ���default���ports+port@0�endpoint � � � ��bandgap@48002524�H%$ti,omap36xx-bandgap �target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_core�H �8sysc  ��fck+ H �smartreflex@0ti,omap3-smartreflex-core�target-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_iva�H �8sysc  ��fck+ H �smartreflex@480c9000ti,omap3-smartreflex-mpu-iva�target-module@50000000ti,sysc-omap4ti,sysc�P�P� revsysc  ���fckick+ Popp-tableoperating-points-v2-ti-cpu��opp50-300000000 )� 0ssssss >���� Oopp100-600000000 )#�F 0O�O�O�O�O�O� >����opp130-800000000 )/� 07�7�7�7�7�7� >����opp1g-1000000000 );�� 0������ >���� [opp_supplyti,omap-opp-supply f�thermal-zonescpu_thermal �� �� �N  �tripscpu_alert �8� ���passive� cpu_crit �_� �� �criticalcooling-mapsmap0 �  �!��������memory@80000000�memory��leds gpio-leds�default�"user0 �user0 �# �noneled1 �led1 �� �cpu0led2 �led2 �� �noneoscillator� fixed-clockD�����regulator-vddvarioregulator-fixed �vddvario�regulator-vdd33aregulator-fixed�vdd33a�gpio_keys gpio-keys�default�$%sysboot2 �sysboot2 �&  sysboot5 �sysboot5 �&  gpio1 �gpio1 ��  gpio2 �gpio2 ��  soundti,omap-twl4030 "omap3logic +'dmtimer-pwmti,omap-dmtimer-pwm�default�( 4)c >�.displaynewhaven,nhd-4.3-480272ef-atxl �15�default�* N+ ��portendpoint ,�backlightpwm-backlight�default�- X.LK@, ] (2<FPZd o ���+wl12xx_vmmcregulator-fixed�vwl1271�w@�w@ �� �p � �/� compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0enable-gpiosmax-speedbci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnsstatus#io-channel-cellsti,use_poweroffvaa-supplyvdd-supplyvdd_io-supplyinput-clock-frequencypixel-clock-frequencyremote-endpointreadonlyvio-supplytouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressureti,x-plate-ohmsti,esd-recovery-timeout-ms#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyspi-cphaspi-cpolpagesizeaddress-widthti,dual-voltpbias-supplycd-gpiosvmmc-supplybus-widthcap-power-off-cardnon-removableref-clock-frequencytcxo-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optrb-gpiosgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespowervdds_dsi-supplyvdda_video-supplydata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-typehsync-activevsync-activepclk-sample#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelabellinux,default-triggerlinux,codewakeup-sourceti,modelti,mcbspti,timersti,clock-sourcebacklightpwmsbrightness-levelsdefault-brightness-levelgpiostartup-delay-usenable-active-highvin-supply